Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – By reaction with substrate
Reexamination Certificate
2002-08-08
2003-05-06
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
By reaction with substrate
C438S248000, C438S391000, C438S408000, C438S441000
Reexamination Certificate
active
06559069
ABSTRACT:
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The present invention relates to a process for the electrochemical oxidation of a semiconductor substrate that has recesses formed in a silicon surface region. The invention relates, in particular, to the formation of oxide in trenches, for example, capacitor trenches, or mesopores which are formed in a silicon substrate.
The present invention can be used particularly advantageously for fabricating DRAM (dynamic random access memory) memory cells. Memory cells of this type, which are produced almost exclusively as single-transistor memory cells, generally include a read transistor and a storage capacitor. The information is stored in the storage capacitor in the form of an electric charge that represents a logic 0 or a logic 1. Actuating the read transistor via a word line allows this information to be read via a bit line. The storage capacitor must have a minimum capacitance for reliably storing the charge, and to make it possible to differentiate the information item which has been read. The lower limit for the capacitance of the storage capacitor is currently considered to be 25 fF.
Since the storage density increases from memory generation to memory generation, the surface area required by the single-transistor memory cell must be reduced from generation to generation. At the same time, the minimum capacitance of the storage capacitor has to be retained.
Up to the 1 Mbit generation, both the read transistor and the storage capacitor were produced as planar components. Beyond the 4 Mbit memory generation, the area taken up by the memory cell was reduced further by using a three-dimensional arrangement of the read transistor and the storage capacitor. One possibility is for the storage capacitor to be produced in a trench. In this case, a diffusion region that adjoins the wall of the trench and a doped polysilicon filling arranged in the trench act as electrodes for the storage capacitor. Therefore, the electrodes of the storage capacitor are arranged along the surface of the trench. In this way, the effective surface area of the storage capacitor, on which the capacitance is dependent, is increased with respect to the space taken up by the storage capacitor on the surface of the substrate, which corresponds to the cross section of the trench. By reducing the cross section of the trench, it is possible to further increase the packing density. However, for technological reasons there are limits on the extent to which the depth of the trench can be increased.
However, the effective surface area of the storage capacitor and therefore the capacitance of the capacitor can be increased by measures which increase the surface area, such as for example, widening the capacitor trench in the lower region, etching mesopores or by the HSG (hemi-spherical grain) process (roughening of the silicon surface), without increasing the space taken up in the horizontal plane as a result.
As will be explained below, the present invention can be applied particularly advantageously to widening existing recesses. Furthermore, an important application area is the formation of oxide on special geometric structures.
Electrically insulating layers of oxides or nitrides play a very important role in the fabrication of DRAM memory cells. While in earlier DRAM generations, these layers were generally used in planar form and were produced by deposition and/or heat treatment and were then patterned. Since the introduction of the capacitor trenches, increased emphasis has been placed on integrating dielectrics in the form of cylinder jackets (for example as insulation collars for disconnecting a parasitic transistor) or in the form of reagent glasses (for example the node capacitor dielectric).
Hitherto, oxide layers have generally been formed by thermal oxidation under dry or wet conditions (furnace processes) or by deposition. In these processes, the thickness of the oxide layers can be controlled very successfully by setting the reaction time, for example.
In particular in order to widen, for example, capacitor trenches or mesopores, sacrificial oxide layers are used and are subsequently removed again. In this case or also in the case of oxidation of thin active silicon layers of SOI substrates, there may in particular be a need for the silicon material which is present, for example, below the sacrificial oxide layer to be converted into oxide apart from a defined residual thickness. In the processes described above, this can only be achieved by complex process control.
U.S. Pat. No. 6,143,627 discloses a process for the electrochemical oxidation of silicon. In this process, certain parts of a silicon substrate are covered by a nonconductive layer and the silicon substrate is brought into contact with an electrolyte. A voltage is applied between a cathode in the electrolyte and the silicon substrate, so that a reaction between silicon and the electrolyte to form silicon dioxide takes place at the uncovered surface regions of the silicon substrate. A different layer thickness is achieved depending on the applied voltage and the reaction time. According to the invention described in this patent, there is no limiting of the layer growth, i.e. in the diagram shown in
FIG. 5
of the patent, the layer thickness grows in strictly monotonous fashion and there is no saturation. Furthermore, no recesses whatsoever are formed in the silicon surface region.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a process for the electrochemical oxidation of a semiconductor substrate with which a predetermined oxide thickness is produced in recesses in a silicon surface region or with which a minimum silicon layer thickness remains between two adjacent recesses.
With the foregoing and other objects in view there is provided, in accordance with the invention, a process for an electrochemical oxidation of a semiconductor substrate, which includes steps of: providing a semiconductor substrate having at least one surface region formed with recesses being spaced apart from one another by a spacing, said surface region having silicon and a predetermined doping; providing an electrolyte in contact with the surface region; applying a voltage between the semiconductor substrate and a cathode configured in the electrolyte to bring about a reaction between the surface region and the electrolyte in order to form silicon oxide; determining that the electrochemical oxidation has ended based on a self-limiting effect; and interrupting the voltage between the semiconductor substrate and the cathode.
In accordance with an added feature of the invention, the self-limiting effect is brought about as a result of reaching a predetermined oxide thickness when the voltage between the semiconductor substrate and the electrolyte is a given voltage and when the electrolyte has a given composition.
In accordance with an additional feature of the invention, the self-limiting effect is brought about as a result of a layer thickness between two adjacent ones of the recesses falling below a minimum residual silicon layer thickness when the voltage between the semiconductor substrate and the electrolyte is a given voltage and when the electrolyte has a given composition.
In accordance with another feature of the invention, the process includes: setting the voltage and a composition of the electrolyte such that a following relationship applies:
d
≧2*(an extent of the space charge region+an oxide thickness that will be produced);
where d is a layer thickness of the silicon that is between two adjacent ones of the recesses. The extent of the space charge region is dependent on a level of an effective voltage acting over the space charge region, and the effective voltage is dependent on the voltage that is applied and a composition of the electrolyte.
In accordance with a further feature of the invention, the electrolyte includes an agent for etching silicon oxide.
In accordance with a further added feature of the invention, the process is used to oxidize faces of capac
Birner Albert
Goldbach Matthias
Ghyka Alexander
Greenberg Laurence A.
Infineon - Technologies AG
Mayback Gregory L.
Stemer Werner H.
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