Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-07-18
2006-07-18
Owens, Douglas W (Department: 2811)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S237000, C257S173000
Reexamination Certificate
active
07078283
ABSTRACT:
A new process is provided for the creation of an ESD protection circuit. The invention starts with a first conventional gate electrode and a second gate electrode that is designated as being the gate electrode that provides the ESD protection function. The contact surfaces of the first and second gate electrode are salicided, an etch stop layer is deposited which serves as an etch stop for the creation of contact openings to the contact surfaces of the second gate electrodes. The etch stop layer is removed from the surface of the source/drain regions of the second (that is the ESD) gate electrode. A layer of dielectric is deposited over the first and the second gate electrodes, contact openings are created through the layer of dielectric to the source/drain contact surfaces of the first and second gate electrodes. Significantly, an overetch into the source/drain regions of the second (the ESD) gate electrode occurs during this contact etch. The contact openings are filled with a metal. The contact interconnects into the source/drain regions of the ESD gate electrode provide a low-resistivity leakage path from the contact interconnect through the source/drain regions into the substrate on the surface of which the gate electrodes have been created. This low-resistivity leakage path is the ESD protection path of the invention.
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Duane Morris LLP
Owens Douglas W
Taiwan Semiconductor Manufacturing Company
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