Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-05-05
2000-02-29
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438275, 438276, 438291, 438525, H01L 218236
Patent
active
060308710
ABSTRACT:
A dual bit read only memory cell has two bits separately stored in two different areas of the channel, such as the left and right bit line junctions of the channel. A programmed bit has a threshold pocket implant self-aligned to its bit line junction and an unprogrammed bit has no such implant. An array of such cells is manufactured by laying down a bit line mask and separately programming the two bit line junctions. For each bit line junction, the bit line junctions which are to remain unprogrammed are first covered, with a junction mask, after which the array is exposed to a threshold pocket implant at a 15-45.degree. angle, to the right or to the left. The junction mask is removed and the process repeated for the other bit line junction. Finally, the bit line mask is removed. In an alternative embodiment, the threshold pocket implant is two implants, of two different materials.
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Kennedy Jennifer M.
Niebling John F.
Saifun Semiconductors Ltd.
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