Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-08-15
2004-08-31
Chen, Jack (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000, C438S653000, C438S656000
Reexamination Certificate
active
06784038
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a process for producing a semiconductor integrated circuit device, and, more particularly, the invention relates to a technique that is effective for application to production of a semiconductor integrated circuit device having an MOSFET (metal oxide semiconductor field effect transistor) of a polymetal structure, in which a gate electrode is constituted with a laminated film of polycrystalline silicon containing boron (B) and a refractory metal.
Japanese Patent Laid-Open No. 132136/1-984 (hereinafter referred to as “Kobayashi 1”) discloses a technique in which after forming a gate electrode of a polymetal structure containing a W film or an Mo film on an Si (silicon) substrate, light oxidation is carried out in a mixed atmosphere of steam and hydrogen to selectively oxidize only Si without oxidizing the W (Mo) film. This utilizes characteristics in which the steam/hydrogen partial pressure ratio, at which the redox reaction is at equilibrium, is different between W (Mo) and Si, and the selective oxidation of Si is realized in such a manner that the partial pressure ratio is set in a range in which, when W (Mo) is oxidized, it is immediately reduced with co-existing hydrogen, but Si remains as being oxidized. The mixed atmosphere of steam and hydrogen is formed by a bubbling method, in which a hydrogen gas is supplied into pure water contained in a container, and the steam/hydrogen partial pressure ratio is controlled by changing the temperature of the pure water.
Furthermore, other principal publications relating to selective oxidation by a group of the inventors of the above-described subject matter include Japanese Patent Laid-Open No. 89943/1985 (hereinafter referred to as “Kobayashi 2”) and Japanese Patent-Laid-Open No. 150236/1986 (hereinafter referred to as “Iwata”).
Japanese Patent Laid-open No. 94716/1995 (hereinafter referred to as “Muraoka”) discloses a technique in which, after forming a gate electrode of a polymetal structure containing a metal nitride layer, such as TiN, and a metal layer, such as W, on an Si substrate via a gate oxide film, light oxidation is carried out in an atmosphere of a reducing gas (hydrogen) and an oxidative gas (steam) diluted with nitrogen. According to this technique, it is found that only Si can be selectively oxidized without oxidizing the metal layer, and oxidation of the metal nitride layer can also be prevented because the denitrification reaction from the metal nitride layer is prevented by diluting the steam/hydrogen mixed gas with nitrogen.
In Series of Theses of 45th Symposium of Semiconductor Integrated Circuit Techniques, held on Dec. 1 and 2 of 1992, pp. 128 to 133, (hereinafter referred to as Nakamura) there is disclosed a technique for forming an oxide film in a strong reducing atmosphere containing steam synthesized by a stainless catalyst.
SUMMARY OF THE INVENTION
In a CMOS LSI, the circuit of which is constituted by a fine MOSFET having a gate length of 0.18 &mgr;m or less, a gate working process using a low-resistance conductive material including a metal layer is employed to ensure high speed operation by reducing the gate delay during operation with a low voltage.
What is most likely to be the low resistance gate electrode material of this type is a polymetal obtained by laminating a refractory metal film on a polycrystalline silicon, film. Because the polymetal has a low sheet resistance of about 2 &OHgr; per square, it can be used not only as the gate electrode material), but also as an interconnecting material. As the refractory metal, W (tungsten), Mo (molybdenum) and Ti (titanium) are used, which exhibit good low resistance characteristics even in a low temperature process of 800° C. or less and have a high electromigration resistance. When these refractory metal films are laminated directly on the polycrystalline silicon film, the adhesion strength between them may be decreased, and a silicide layer having a high resistance is formed at the interface between them during a high temperature heat treatment process. Therefore, the actual polymetal gate is constituted by a three-layer structure, in which a barrier layer comprising a metal nitride film, such as TiN (titanium nitride) and WN (tungsten nitride), is inserted between the polycrystalline silicon film and the refractory metal film.
The summary of the conventional gate working process is as follows. A semiconductor substrate is tubjected-to thermal oxidation to form a gate oxide film on the surface thereof. In general, the formation of the thermal oxide film is carried out in a dry oxygen atmosphere, but in the case of forming the gate oxide film, a wet oxidation method is employed because the defect density of the film can be decreased. In the wet oxidation method, a pyrogenic method is employed, in which hydrogenis burned in an oxygen atmosphere to form water, and the water thus formed is supplied along with oxygen to the surface of a semiconductor wafer.
However, in the pyrogenic method, because hydrogen discharged from a nozzle attached to a tip end of a hydrogen gas conduit made of quartz is ignited and burned, there is a possibility that particles are formed due to melting of the nozzle in response to heat, which can become a cause of contamination of the semiconductor wafer. Thus, a method of forming water by a catalyst method without burning has been proposed (Japanese Patent Laid-Open No. 152282/1993).
After a gate electrode material is accumulated on the gate oxide film formed by the wet oxidation method, the gate electrode material is patterned by dry etching using a photoresist as a mask. Thereafter, the photoresist is removed by ashing, and the dry etching residue and the ashing residue remaining on the surface of the substrate are removed by using an etching solution such as hydrofluoric acid.
When the wet etching described above is conducted, the gate oxide film in a region other than the lower part of the gate electrode is removed, and, at the same time, the gate oxide film at the edge of the side wall of the gate electrode is also isotropically etched to cause an undercut. Therefore, a problem of lowering the resisting voltage of the gate electrode occurs as it stands. Thus, in order to improve the profile at the edge of the side wall of a gate electrode which has been subjected to undercut, a process is conducted in which the substrate is again subjected to thermal oxidation to form an oxide film on the surface (hereinafter referred to as a light oxidation process).
However, because the refractory metal, such as W and Mo, described above is extremely liable to be oxidized in a high temperature oxygen atmosphere, when the light oxidation process is applied to a gate electrode having a polymetal structure, the refractory metal is oxidized to increase the resistance, and a part thereof is peeled from the substrate. Therefore, in the gate working process using a polymetal, means for preventing oxidation of the refractory metal during the light oxidation process is necessary.
In the process of forming the gate electrode having a polymetal structure, the light oxidation in a steam/hydrogen mixed gas having the prescribed partial pressure ratio is effective means for improving the resisting voltage of the gate oxide film and for preventing oxidation of the metal film.
However, in the conventional bubbling method, which has been proposed as a method for forming the steam/hydrogen mixed gas, because the steam/hydrogen mixed gas is formed by supplying a hydrogen gas to pure water set aside in a container, there is a possibility that foreign matter contained in the pure water will be transferred to an oxidation furnace along with the steam/hydrogen mixed gas to contaminate a semiconductor wafer.
Furthermore, in the bubbling method, because the steam/hydrogen partial pressure ratio is controlled by changing the temperature of the pure water, there are problems in that (1) the partial pressure is liable to fluctuate, and it is difficult to realize the optimum partial pressure ratio with hi
Hanaoka Yuko
Mitani Shinichiro
Tanabe Yoshikazu
Yamamoto Naoki
Antonelli Terry Stout & Kraus LLP
Chen Jack
Renesas Technology Corp.
LandOfFree
Process for producing semiconductor integrated circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Process for producing semiconductor integrated circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for producing semiconductor integrated circuit... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3314887