Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-10-06
2003-03-04
Smith, Matthew S. (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S612000, C438S106000, C438S025000, C438S026000, C438S064000, C257S678000
Reexamination Certificate
active
06528407
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims priority from prior French Patent Application No. 99-12545, filed Oct. 8, 1999, the entire disclosure of which is herein incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of semiconductor packages containing an integrated-circuit chip and more particularly to the field of the production of electrical-connections on semiconductor packages using solder drops or solder balls.
2. Description of Related Art
Present techniques for semiconductor packages comprise an external protective layer made of an organic material constituting a mask, in which layer a multiplicity of apertures are made so as to expose metallic electrical-connection regions or pads, generally made of copper, connected to the chip.
In a first known technique for semiconductor packages, these electrical-connection regions are completely exposed. They are covered with an anti-diffusion first metal layer, generally made of nickel, with an anti-oxidation second metal layer, generally made of gold, and with a metal solder drop or solder ball, generally made of a tin-based alloy, this drop not reaching the wall of the apertures. This first technique, although useful, is not without its shortcoming. One shortcoming is the weakness of the metal connection regions which may become detached from the package.
In a second known technique for semiconductor packages, the electrical-connection regions are exposed only in their central part. The electrical-connection regions are covered, as far as the wall of the apertures, with an anti-diffusion first metal layer, with an anti-oxidation second layer and then with a metal solder drop, this drop filling the aperture and extending well beyond it. This second technique although useful is not without its shortcomings. One shortcoming is a discontinuity in the surface of the metal solder drop is produced along the edge of the aperture because of the fact that the solder drop has a tendency to extend over the external surface of the external protective layer, around the aperture, so that internal cracks frequently appear, which weaken the solder drop.
Accordingly, a need exists to overcome the above mentioned shortcomings with the prior art and to provide a process for producing electrical-connections on a semiconductor package to minimize detachment from the semiconductor package and to improve the strength of the solder drop.
SUMMARY OF THE INVENTION
The present invention improves the strength of the electrical-connections of a semiconductor package with solder drops or solder balls.
The subject of the present invention is a process for producing electrical-connections on a semiconductor package containing an integrated-circuit chip and having an external protective layer having apertures at least partly exposing metal electrical-connection regions.
According to the invention, this process consists in filling the apertures with a metal electrical-connection layer due to the effect of a supply of electric current in the central part of the aperture via a tip, in such a way that the metal layer covers at least the wall of the aperture, and in soldering a metal solder drop to the metal electrical-connection layer in such a way that this solder drop is at least partly not in contact with the external protective layer.
According to the invention, the process preferably consists in depositing an anti-oxidation metal layer on the metal electrical-connection layer and in soldering the metal solder drop to the anti-oxidation metal layer. The subject of the invention is also a semiconductor package containing an integrated-circuit chip.
According to the invention, this package comprises an external protective layer having apertures at least partly exposing metal electrical-connection regions. The apertures are filled with a metal electrical-connection layer covering at least their wall. Furthermore, a metal solder drop is soldered to the connection layer and at least part of the solder drop is not in contact with the external protective layer.
According to the invention, the central part of the electrical-connection layer is preferably recessed and the thickness of the peripheral part of the layer is preferably engaged beneath the external protective layer.
According to the invention, the walls of the apertures of the external protective layer are preferably divergent.
According to the invention, the peripheral part of the metal electrical-connections regions is preferably engaged beneath the external protective layer.
According to the invention, the metal electrical-connection regions may advantageously comprise branches engaged beneath the external protective layer.
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Preliminary Search Report dated Jun. 22, 2000 for French Patent Application No. 99 12545.
Castellane Alexandre
Petit Luc
Fleit Kain Gibbons Gutman & Bongini P.L.
Gibbons Jon A.
Jorgenson Lisa K.
Lee Jr. Granvill D
Smith Matthew S.
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