Process for preparing a vertically differentiated transistor dev

Details Process for preparing a vertically differentiated transistor dev Process for preparing a vertically differentiated transistor dev

1986-08-19

1988-07-26

Schor, Kenneth M.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156640, 156652, 156656, 156665, H01L 21306, C23F 100

Patent

active

047598212

ABSTRACT:
A process for the fabrication of a vertically differentiated semiconductor structure is disclosed. In this process the semiconductor structure is covered with a vertical erosion control mask. The control mask covering at least one horizontal surface of the semiconductor structure is removed leaving the vertical surface covering intact. An isotropic etching of the uncovered horizontal surface next occurs. Finally, the control mask covering of the vertical surface of the semiconductor structure is removed. This process permits etching treatment of horizontal surface defects without adverse effect on the vertical surface of the semiconductor structure.

REFERENCES:
patent: 4454014 (1984-06-01), Bischoff
patent: 4482442 (1984-11-01), Kohl et al.
patent: 4528066 (1985-07-01), Merkling, Jr. et al.
patent: 4529475 (1985-07-01), Okano et al.
patent: 4572765 (1986-02-01), Berry

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