Process for PCM integration with poly-emitter BJT as access...

Details Process for PCM integration with poly-emitter BJT as access... Process for PCM integration with poly-emitter BJT as access...

2008-05-16

2010-10-12

Monbleau, Davienne (Department: 2893)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S202000, C438S625000, C257S005000, C257S370000, C257SE27004, C257SE29170

Reexamination Certificate

active

07811879

ABSTRACT:
Techniques for forming a memory cell. An aspect of the invention includes forming FET gate stacks and sacrificial cell gate stacks over the substrate. Spacer layers are then formed around the FET gate stacks and around the sacrificial cell gate stacks. The sacrificial cell gate stacks are then removed such that the spacer layers around the sacrificial cell gate stacks are still intact. BJT cell stacks are then formed in the space between the spacer layers where the sacrificial cell gate stacks were formed and removed, the BJT cell stacks including an emitter layer. A phase change layer above the emitter contacts and an electrode above the phase change layer are then formed.

REFERENCES:
patent: 3717515 (1973-02-01), Ashar et al.
patent: 2002/0177292 (2002-11-01), Dennison

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