Process for nitriding the gate oxide layer of a...

Details Process for nitriding the gate oxide layer of a... Process for nitriding the gate oxide layer of a...

1999-10-18

2002-04-16

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S324000, C438S216000, C438S775000, C438S769000, C438S786000, C438S783000

Reexamination Certificate

active

06372581

ABSTRACT:

The present invention relates in general to a process for fabricating semiconductor devices and, more particularly, to a process for nitriding the gate oxide layer (SiO
2
) of a semiconductor device, for example a CMOS device.
The nitriding process according to, the invention proves particularly advantageous for the fabrication of semiconductor devices with a very thin gate oxide layer (≦3 nm, preferably ≦2.5 nm).
With the decrease in the thickness of the gate oxide layer (≦3 nm) in semiconductor devices, such as for example PMOS devices, the diffusion of dopant atoms such as boron through the oxide layer during the subsequent heat treatments of the doped gate may impair the performance and reliability of the devices obtained.
Various solutions have been envisaged for remedying this problem of dopant-atom diffusion through the gate oxide layer.
One solution to this problem involves nitriding the gate oxide layer.
It has also been proposed to nitride the gate oxide layer with NH
3
or N
2
O gas.
However, although the oxynitride formed by NH
3
in the gate oxide layer leads to an acceptable barrier against diffusion of the dopant (boron), the incorporation of hydrogen atoms results in the presence of fixed charges and an increase in the trapping of electrons.
Conversely, the use of N
2
O is characterized by the absence of trapping but however, obtaining oxynitrides from N
2
O requires expensive thermal processes which are essential for obtaining the high nitrogen concentration at the Si/SiO
2
interface.
Further, annealing in N
2
O proves ineffective for nitriding thin oxide layers (<3 nm).
It has recently been proposed to use NO gas for nitriding gate oxide layers. In all cases, a gate oxide layer (SiO
2
) was initially grown on the silicon substrate, then the gate oxide layer was nitrided using NO gas by a rapid thermal process (RTP). This process requires relatively high temperatures (850-900° C.) and pressures of 10
4
Pa or more. Also, it does not allow the presence of nitrogen to be localized precisely at the interface between the substrate and the gate oxide layer (Si/SiO
2
interface).
It would be desirable to provide a process for nitriding the gate layer which remedies the drawbacks of the prior art.
In particular, a process for nitriding the gate oxide layer of a semiconductor device which makes it possible to restrict the diffusion of the dopant (boron) through the gate oxide layer for very thin gate oxide layers (≦2.5 nm), and which makes it possible to localize the presence of nitrogen at the interface between the substrate and the gate oxide layer would be desirable.
The above objects are achieved by providing a process for nitriding the gate oxide layer of a semiconductor device, including
chemically growing a native silicon oxide layer with a thickness at most equal to 1 nm on a silicon substrate,
treating the substrate coated with the native silicon oxide layer with nitric oxide (NO) gas at a temperature at most equal to 700° C. and under a pressure at most equal to 10
4
Pa in order to obtain a gate oxide layer including nitrogen atoms principally located close to the substrate/gate oxide layer interface.


REFERENCES:
patent: 6221788 (2001-04-01), Kobayashi et al.
Bhat et al. (“Effects of chemical composition on the electrical properties of NO-nitrided SiO2” Applied Physics Letters 66(10), pp. 1225-1227, Mar. 1995.*
Maiti et al. “Reoxidized nitric oxide (ReoxNO) process and its effect on the dielectric reliability of the LOCOS edge” IEEE Symposium on VLSI Technology, pp. 63-64, Jun. 1995.*
Kumar et al, “Optimization of sub 3 nm gate dielectrics grown by rapid thermal oxidation in a nitric oxide ambient,” Appl. Phys. Lett., vol. 70, No. 3, Jan. 1997, pp. 384-386.
Laviale et al, “Study of Nitrogen Incorporation in Gate Oxides using the Resistance to Oxidation Method,” Mat. Res. Soc. Symp. Proc., vol. 429, ©1996 by Material Research Society, pp. 251-256.
Guzev et al., “The composition of ultrathin silicon oxynitrides thermally grown in nitric oxide,” J. Appl. Phys., vol. 82, No. 2, Jul. 1997, pp. 896-898.
Laviale et al., “Controlled Thin Oxidation and Nitridation in a Single Wafer Cluster Tool,” Mat. Res. Soc. Symp. Proc., vol. 387, ©1995 by Material Research Society, pp. 253-257.

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