Process for manufacturing rounded polysilicon electrodes on...

Details Process for manufacturing rounded polysilicon electrodes on... Process for manufacturing rounded polysilicon electrodes on...

2011-01-11

2011-01-11

Estrada, Michelle (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S211000, C438S257000, C438S706000, C438S745000, C257SE29129, C257SE29300, C257SE21179, C257SE21422, C257SE21680

Reexamination Certificate

active

07867837

ABSTRACT:
A polysilicon layer provided for a polysilicon electrode (8) is patterned by means of a resist mask (5) and an auxiliary layer (4) made of a material that is suitable as an antireflection layer, the auxiliary layer (4) being provided with lateral hollowed-out recesses in such a way that the polysilicon electrode is formed with rounded edges (7) during etching. The auxiliary layer is preferably produced from a soluble material and with a thickness of 70 nm to 80 nm. A base layer (2) may be provided as a gate dielectric of memory cell transistors and additionally as an etching stop layer.

REFERENCES:
patent: 6037246 (2000-03-01), Bhat et al.
patent: 6187676 (2001-02-01), Kim et al.
patent: 6699641 (2004-03-01), Hellig et al.
patent: 2002/0179960 (2002-12-01), Kang et al.
patent: 2003/0049566 (2003-03-01), Sabnis et al.
patent: 2004/0029354 (2004-02-01), You et al.
patent: 2004/0077173 (2004-04-01), Sivakumar
patent: 2004/0195614 (2004-10-01), Chen et al.

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