Process for manufacturing CMOS device

Details Process for manufacturing CMOS device Process for manufacturing CMOS device

1996-10-03

1998-05-05

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438228, 438231, H01L 218238

Patent

active

057473684

ABSTRACT:
A process for manufacturing a CMOS device is disclosed. The process includes steps of forming a field oxide over a pad oxide excluding an active area in order to function the field oxide as an isolation layer; forming a gate oxide on the active area; forming a gate conducting layer over the field oxide and the gate oxide; forming a photoresist on the gate conducting layer; removing a portion of the photoresist and executing a first ion implantation in order to regulate a first threshold voltage of the one of the p-type and the n-type MOS regions; selectively forming an oxide on the gate conducting layer on the one of the p-type and the n-type MOS regions; eliminating a remaining portion of the photoresist on the other one of the p-type and the n-type MOS regions and executing a second ion implantation in order to regulate a second threshold voltage of the the other one of the p-type and the n-type MOS regions; and eliminating the oxide on the one of the p-type and the n-type MOS regions and forming gates, sources and drains in the CMOS device by patterning and etching the gate conducting layer.

REFERENCES:
patent: 4966866 (1990-10-01), Mikata et al.
patent: 5141890 (1992-08-01), Haken
patent: 5270233 (1993-12-01), Hamatake
patent: 5362670 (1994-11-01), Iguchi et al.
patent: 5464789 (1995-11-01), Saito
patent: 5521106 (1996-05-01), Okabe

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