Process for manufacturing capacitors in a solid state configurat

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438254, H01L 218242

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active

058175539

ABSTRACT:
Capacitors, in particular stacked capacitors for a dynamic memory cell configuration are manufactured by first forming a sequence of layers, which include layers made of a first conductive material alternating with layers made of a second material. The second material can be selectively etched with respect to the first material. Layered structures are formed from the sequence of layers, with the flanks of the layered structures each having a conductive support structure. The layered structures are formed with openings, such as gaps, in which the surface of the layers is exposed. The layers made of the second material are selectively removed with respect to the layers made of the first material. The exposed surface of the layers made of the first material and of the support structure are provided with a capacitor dielectric, onto which a counter-electrode is placed. The capacitor is made by etching p.sup.- -doped polysilicon that is selective to p.sup.+ -doped polysilicon.

REFERENCES:
patent: 5053351 (1991-10-01), Fazan et al.
patent: 5196365 (1993-03-01), Gotou
patent: 5384276 (1995-01-01), Ogawa et al.
patent: 5637523 (1997-06-01), Fazan et al.
"Anisotropic Etching of Crystalline Silicon in Alkaline Solutions", J. Electrochem. Soc., vol. 137, No. 11, Nov. 1990.
"Multi-Shell Trench Capacitor Cell for Quarter Giga Bit Dram and Beyond", IBM Corp. 1990, pp. 473-474.
"A Deep-Trenched Capacitor Technology For 4 Mega Bit Dynamic Ram", Yamada et al., IDEM 1985, pp. 702-705.

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