Process for manufacturing a semiconductor device

Details Process for manufacturing a semiconductor device Process for manufacturing a semiconductor device

1999-12-21

2001-11-20

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Introduction of conductivity modifying dopant into...

C438S704000, C438S735000

Reexamination Certificate

active

06319797

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a process for manufacturing a semiconductor device comprising the step of wet-etching the upper film in a multilayer film consisting of different materials. In particular, it relates to a process for manufacturing a semiconductor device comprising the step of, e.g., wet-etching an interlayer insulating film having a multilayer structure consisting of different materials to form a contact hole.
2. Description of the Related Art
Recent miniaturization of semiconductor devices has increasingly required a higher level of fine processing technology, in which a flattening process is significantly important for exposure or fine processing techniques. Insufficient flatness may cause defocus in exposure, loading to not only difficulty in processing a photoresist but also frequent generation of non-etched areas in an etching process using the photoresist as a mask. A technique employing an SOG (Spin On Glass) interlayer film is a promising flattening procedure. An HSQ (Hydrogen Silisesquioxane) film, an SOG in which a metal connecting area may be exposed (i.e., etching-back is not necessary), has been frequently used as a material achieving both reduction in the number of production steps and flattening.
A conventional manufacturing process for a multilayered interconnection structure using an HSQ film will be described with reference to
FIGS. 4 and 5
.
First, an interconnection layer is formed as outlined in FIG.
4
(
a
). On a semiconductor substrate (unshown) is formed a silicon oxide film
1
, on which is then formed an Al interconnection
2
. Over the whole surface are sequentially formed a plasma TEOS (Tetra-Ethyl-Oxy-Silane) oxide film
3
(thickness: 100 nm), an HSQ film
4
(thickness: 500 nm) and a plasma TEOS oxide film
6
(thickness: 200 nm) (FIG.
4
(
a
)). Then, on the surface is formed a mask
7
having an opening. The surface is then wet-etched via the mask
7
with hydrofluoric acid to form a contact hole
9
reaching the Al interconnection
2
is (FIG.
4
(
b
)).
The contact hole is filled with an Al film
10
, which is then patterned to form an upper interconnection to provide a multilayered interconnection structure (FIG.
5
).
As described above, the prior art provides a multilayered interconnection structure by forming the HSQ film
4
and the plasma TEOS film
6
, wet-etching the plasma TEOS film
6
and dry-etching the HSQ film
4
to form the contact hole. The plasma TEOS film is formed on the HSQ film
4
because (i) the HSQ film
4
is less resistant to oxygen plasma ashing during mask stripping or resist stripping, and (ii) the HSQ film is insufficiently adhered to the upper Al interconnection layer. On the other hand, the plasma TEOS film
6
is wet-etched because a sectionally cup-shaped concave is formed by side etching (see, e.g., FIG.
3
). When forming an interconnection layer is formed with a metal requiring reflow such as Al, such a cup-shape may suitably facilitate reflow, leading to an interconnection layer exhibiting good properties.
However, in the prior art, the side of the HSQ film
4
is etched to form a cavity
15
because the HSQ film
4
is etched by an etchant such as BHF several times as fast as the plasma TEOS oxide film
6
. Such a cavity may cause a void
13
during the subsequent step of filling with an Al film (FIG.
5
). Such a problem may also occur, besides the HSQ film, in, e.g., an SOG film.
To avoid the above problem, modifying the surface of the base film has been investigated for improving its resistance to wet-etching to prevent cavity formation. JP-A 4-116825 has disclosed that an SOG film surface is cured by irradiation with hydrogen plasma and then heating to improve its resistance to HF etching. In the technique, hydrogen radicals are incorporated into the SOG film by exposure to hydrogen plasma. The hydrogen radicals can attract inreacted OHs and Hs or OHs and thus make them leave the SOG, facilitating polymerization of the SOG during the subsequent heating process.
However, the technique still has a room for improvement that the SOG cannot be resistant to etching higher than a common SiO
2
film. Specifically, the above technique facilitates polymerization by attracting unreacted OH or H or OH present in the SOG, i.e., allows the SOG to have a film structure similar to a common SiO
2
film. In other words, if hydrogen plasma irradiation is most effective to adequately cure the surface, an SiO
2
film is formed on the SOG surface. The technique may improve resistance to etching, but has a restriction that it cannot permit the surface to be more resistant than SiO
2
. The above process aims to achieve etching resistance of the lower SOG film equivalent to that of the upper SiO
2
film, for preventing a cavity. It can prevent cavity formation in the lower layer to some extent. Wet-etching is, however, not stopped on the surface of the lower layer, so that the contact hole tends to be generally extended, i.e., cup-shaped, as shown in FIG.
6
. In other words, the diameter of the contact hole tends to be larger than a designed value. Such a shape may cause current leak or parasitic capacitance between adjacent interconnections (unshown), leading to a semiconductor device having poor properties. The problem may be particularly significant for a more refined device.
Summary 30a-C-5 in the proceeding No. 2 for 42th Applied Physics Joint Lectures (Japan, spring, 1995) has described that curing in an oxygen-containing atmosphere may reduce an HF etching rate for an SOG film comprising SiH. However, as in the case of the technique described in the above patent application, the process improves etching resistance by converting Si—H into Si—O, and thus cannot achieve wet-etching resistance higher than that in SiO
2
. That is, this process also aims to provide an SOG film structure similar to an SiO
2
film, and therefore, has a limitation in improving HF etching resistance.
To solve the above problems, it has been proposed to form an etching stopper film between the upper film and the base film.
FIG. 7
shows a process in which an SiN film is formed as an etching stopper film.
This process will be described with reference to FIG.
7
. On a substrate is formed an Al interconnection
2
, on which are sequentially formed a plasma TEOS oxide film
3
(thickness: 100 nm), an HSQ film
4
(thickness: 500 nm) and an SiN film
14
(thickness: 50 nm) by CVD. Then, over the surface is formed a plasma TEOS oxide film
6
(thickness: 200 nm) (FIG.
7
(
a
)).
Then, using a mask
7
, it is wet-etched with buffered hydrofluoric acid. Since the SiN film
14
is much more resistant to etching with buffered hydrofluoric acid than the plasma TEOS oxide film
6
, etching is terminated on the upper surface of the SiN film
14
as shown in FIG.
7
(
b
). The product is dry-etched to form a contact hole
9
reaching an interconnection layer
2
(FIG.
7
(
c
)).
This process, however, may form a roof
15
as shown FIG.
7
(
c
) due to difference in a dry-etching rate between the SiN film
14
and the HSQ film
4
. Such a roof may cause problems such as a void during filling the contact hole with an upper-interconnection material and disconnection of the upper interconnection.
Furthermore, the HSQ film
4
is poorly adhered to the SiN film
14
, frequently leading to peeling
16
in the interface between them. Peeling may occur not only in the wall of the contact hole but also in other areas. Then, cracks may be formed from such peeling.
The case in which a silicon nitride film is used as a stopper film has been described. However, even when using other materials, similar problems may, whenever a stopper film is deposited, occur.
SUMMARY OF THE INVENTION
In the light of the above situation, an objective of this invention is to provide a method for effectively preventing etching of the lower films in a multilayer film consisting of different materials during wet-etching its upper film, without forming an etching stopper film. A specific objective of this invention is to provi

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