Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-07-23
1998-11-24
Trinh, Michael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438301, 438585, H01L 21336
Patent
active
058406115
ABSTRACT:
The present invention provides a process for forming an MOS semiconductor device having an LDD structure, which includes a forming a gate electrode by first etching a conductive layer to a certain depth by an RIE process and by second etching the conductive layer by an isotropic plasma etching process. In forming the source/drain of the device, an n.sup.+ source/drain and an n.sup.- source/drain are formed in a sequential manner. The gate line first is formed with its width over-sized compared with its channel length, and finally is formed to its final size.
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patent: 4113515 (1978-09-01), Kooi et al.
patent: 4445266 (1984-05-01), Mai et al.
patent: 4599118 (1986-07-01), Han et al.
patent: 5427971 (1995-06-01), Lee et al.
Kim Jae-Jeong
Lee Chang-Jae
Goldstar Electron Company, Ltd.
Trinh Michael
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