Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive
Reexamination Certificate
2001-09-18
2004-09-14
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Physical stress responsive
Reexamination Certificate
active
06790698
ABSTRACT:
BACKGROUND OF THE INVENTION
Microelectromechanical system (MEMS) deflectable structures such as cantilevers and membranes are used in a number of different optical applications. For example, they can be coated to be reflective to highly reflective and then paired with a stationary mirror to form a tunable Fabry-Perot (FP) filter. They can also be used to define the end of a laser cavity. By deflecting the structure, the spectral location of the cavity modes can be controlled. They can also be used to produce movable lenses or movable dichroic filter material.
The MEMS structure is typically produced by etching features into a device layer to form the structure's pattern. An underlying sacrificial layer is subsequently etched away or otherwise removed to produce a suspended structure in a release process. Often the structural layer is a silicon or silicon compound and the sacrificial layer is silicon dioxide or polyimide. The silicon dioxide can be preferentially etched relative to silicon in hydrofluoric acid, for example.
Typically, deflection of the structure is achieved by applying a voltage between the structure and a fixed electrode. Electrostatic attraction deflects the membrane in the direction of the fixed electrode as a function of the applied voltage. This effect changes the reflector separation in the FP filter or cavity length in the case of a laser. Movement can also be provided by thermal or other actuation mechanism.
High reflectivity coatings (R>98%), coatings requiring some reflectivity and low loss, and/or coatings in which the reflectivity varies as a function of wavelength (e.g., dichroism) require thin film dielectric optical coatings. These coatings typically include alternating layers of high and low index material. The optics industry has developed techniques to produce these high performance coatings and has identified a family of materials with well-characterized optical and mechanical properties. Candidate materials include silicon dioxide, titanium dioxide and tantalum pentoxide, for example.
SUMMARY OF THE INVENTION
A challenge in the production of optical MEMS devices requiring dielectric optical coatings is to develop a device design and corresponding fabrication sequence that contemplates the integration of the MEMS release structure and the optical coatings.
The present invention concerns a process for patterning dielectric layers of the type typically found in optical coatings in the context of MEMS manufacturing. More specifically, a dielectric coating is deposited over a device layer, which has or will be released, and patterned using a mask layer. In one example, the coating is etched using the mask layer as a protection layer. In another example, a lift-off process is used.
The primary advantage of photolithographic patterning of the dielectric layers in optical MEMS devices is that higher levels of consistency can be achieved in fabrication, such as size, location, and residual material stress. Competing techniques such as shadow masking yield lower quality features and are difficult to align. Further, the minimum feature size that can be obtained with shadow masks is limited to ~100 &mgr;m, depending on the coating system geometry, and they can require hard contact with the surface of the wafer, which can lead to damage and/or particulate contamination.
Further advantages of the proposed patterning sequence are that the coating can be applied conformally over the surface of the wafer. The deposition systems used for optical coatings generally do not conform to the same standards of cleanliness as semiconductor processing tools. Applying a conformal coating to the surface of a plain wafer allows the material to undergo standard clean processes (RCA, piranha, etc.) prior to being processed in other tools. Thus, the risk of contamination can be managed effectively. These cleaning steps can be repeated after the etching of the dielectric film to form the patterned features.
In some instances, the dielectric coating may not be able to survive exposure to the etchants used to remove the sacrificial layer during the release process. In such cases, according to the invention, the dielectric layer is encapsulated by a protection layer or deposited on the released or partially released device layer.
The above and other features of the invention including various novel details of construction and combinations of parts, and other advantages, will now be more particularly described with reference to the accompanying drawings and pointed out in the claims. It will be understood that the particular method and device embodying the invention are shown by way of illustration and not as a limitation of the invention. The principles and features of this invention may be employed in various and numerous embodiments without departing from the scope of the invention.
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Ayazi, Farrokh; Najafi, Khalil, “High Aspect-Ratio Combined Poly and Single-Crystal Silicon (HARPSS) MEMS Technology,” Journal of Microelectromechanical Systems, vol. 9, No. 3 Sep. 3, 2000, pp. 288-294.
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Cook Christopher C.
Flanders Dale C.
Le Minh Van
Miller Michael F.
Nagle Steven F.
Axsun Technologies, Inc.
Hoang Quoc
Houston J. Grant
Nelms David
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