Process for forming slots having near vertical sidewalls at thei

Details Process for forming slots having near vertical sidewalls at thei Process for forming slots having near vertical sidewalls at thei

1984-01-04

1985-08-06

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156646, 156651, 156653, 156657, 1566591, 156662, 204192E, 427 88, 427 93, H01L 21306, B44C 122, C03C 1500, C03C 2506

Patent

active

045334307

ABSTRACT:
A slot formation process is provided in which the regions near the mouth of the slot are coated, while the slot is being formed, with a material which is resistant to the etchant being used to form the slot. The coating may be applied continuously or may be applied at specific points in the slot formation process. During the formation of the middle and bottom regions of the slot the coated upper regions retain a nearly vertical contour shape since they are protected from undesired etching by ions whose trajectories have been impacted by charge accumulations at the mouth of the slot. The coating material may be a thin oxide layer of the semiconductor material or may be a layer of an appropriate etch resistant material.

REFERENCES:
patent: 4422897 (1983-12-01), Horwitz
patent: 4432132 (1984-02-01), Kinsbron et al.
patent: 4445967 (1984-05-01), Kameyama
patent: 4450042 (1984-05-01), Purdes
Electronics, Nov. 3, 1983, Reactive-ion Etching Eases Restrictions on Materials and Feature Sizes by D. N. K. Wang et al., pp. 157-161.
Annual Review of Material Science, V. 9, 1979, pp. 373-403, Vertial Etching of Silicon at Very High Aspect Ratios by D. L. Kendall.
Proceedings IEDM 83, A Submicron CMOS Megabit Level Dynamic RAM Technology Using Doped Face Trench Capacitor Cell by Kazushige Minegishi et al., pp. 319-322.
J. Vac. Science & Technology, V. 17, No. 5, Sep./Oct. 1980, Dry Etching for Pattern Transfer by H. W. Lehmann et al., pp. 1177-1183.
IEEE Transactions on Electron Devices, V. ED-28, No. 11, Nov. 1981, Reactive Ion Etching for VLSI by L. M. Ephrath, pp. 1315-1319.

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