Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2000-07-25
2001-05-22
Booth, Richard (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S791000
Reexamination Certificate
active
06235654
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of semiconductor processing, and in particular, to the formation of a nitride layer on a semiconductor wafer.
BACKGROUND OF THE INVENTION
Various integrated circuits utilize structures formed with nitride for various purposes. For example, a spacer formed of nitride may be provided on the sidewalls of a gate during the front-end of the line (FEOL) processing. The nitride spacers are typically formed on the gate sidewalls after a source/drain extension implant has been performed. Following the formation of the nitride spacers, a second dopant implantation is performed to form the source/drains. The nitride spacers prevent the additional dopants in the source/drain implant from being implanted into the source/drain extension area underneath the nitride spacers. This maintains a lightly doped extension region, while allowing the remaining portions of the source/drain region to be doped appropriately.
It is preferable when forming nitride spacers to provide a low deposition rate in order to provide better process control. In a known plasma-enhanced chemical vapor deposition (PECVD) process, used to provide a nitride layer, silane (SiH
4
) is provided to the deposition chamber at a flow rate of between 151 to 183 sccm. Nitrogen (N
2
) is provided at a flow rate of 3000 sccm. Ammonia (NH
3
) is provided at a flow rate of between 120 to 140 sccm. Pressure is maintained in the deposition chamber at 4.9 torr, with a temperature of 400° C. RF power is applied in the chamber at 625 watts and the spacing is 540 mils.
The results of the nitride deposition process above deposits nitride at a deposition rate of 100 Å/sec. The nitride layer has a refractive index comprising RI=1.915, with step coverage=70%. Non-uniformity of the thickness within a wafer is 1.5%. The non-uniformity in the thickness from wafer-to-wafer is 0.5%. Improvements in the quality of the nitride layer is desirable.
SUMMARY OF THE INVENTION
There is a need for a production-worthy process of PECVD nitride spacer deposition with wide process margin for better process control to produce a nitride layer with excellent step coverage, and improved thickness uniformity within wafer and wafer-to-wafer.
This and other needs are met by embodiments of the present invention which provide a method of depositing nitride on a wafer in a plasma-enhanced chemical vapor deposition reactor, comprising the steps of applying reactant gasses to the wafer, including silane at a flow rate in a range of 190 to 270 sccm, nitrogen at a flow rate in a range of 4000 to 9000 sccm, an ammonia in a range of 30 to 100 sccm. Reactor pressure is maintained between 3 to 4.8 torr, while RF power is applied between 300 to 500 watts.
In certain embodiments of the invention, silane is applied at a flow rate of 230+/−10% sccm, nitrogen is applied at a flow rate of 6500+/−10% sccm, and ammonia is applied at a flow rate of 65+/−10% sccm. The pressure is maintained in the chamber at 4.4 torr at 400° C. The RF power is equal to 430 watts and the spacing is equal to 600 mils.
By using the processes of the present invention, a deposition rate of nitride may be obtained that is very low, e.g. 42 Å/min. An excellent step coverage, which compares favorably with that of nitride layers produced by the LPCVD process, is achieved with the present invention. For example, the step coverage of the nitride layer produced in accordance with embodiments of the present invention may be 80%, in comparison with step coverage of 70% produced by the prior art process. Also, the non-uniformity of the thickness within wafers is reduced to 0.7%, from the prior art 1.5%, and the wafer-to-wafer thickness non-uniformity is reduced to 0.4%, in comparison to the prior art 0.5%. Further, the present invention also reduces a nitride layer with a dense film having a refractive index (RI) equal to 2.0, an improvement over the RI of 1.915 produced by the prior art process.
The earlier-stated needs are also met by another embodiment of the present invention which provides a method for producing a semiconductor device comprising the steps of forming a gate having sidewalls and forming an oxide layer on the gate sidewalls. The oxide layer is a super low deposition rate PECVD oxide layer having a deposited thickness of less than 200 angstroms, refractive index greater than or equal to 1.48, thickness non-uniformity of 1.1% or less, and step coverage of 90% or greater. A nitride layer is formed on the oxide layer. The nitride layer is a very low deposition rate PECVD nitride layer with a refractive index greater than or equal to 1.95, and with a step coverage of 75% or greater, with a thickness non-uniformity within a wafer of 1.0%, and step coverage of 75% or greater.
The semiconductor device provided by the above-described methods of the present invention has an increased P-channel Idsat:Idoff by 10%, compared to that of low pressure chemical vapor deposition (LPCVD) methods.
The foregoing and other features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4854263 (1989-08-01), Chang et al.
patent: 5736423 (1998-04-01), Ngo
patent: 5904529 (1999-05-01), Gardner et al.
patent: 5925914 (1999-07-01), Jiang et al.
patent: 6077764 (2000-06-01), Sugiarto et al.
Huertas Robert
Ngo Minh Van
Ruelke Hartmut
Advanced Micro Devices , Inc.
Booth Richard
Ghyka Alexander G.
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