Process for forming differential spaces in electronics...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257SE21626, C257SE21640, C257S500000, C257S501000, C257S391000, C257S392000

Reexamination Certificate

active

07910444

ABSTRACT:
A forms spacers in a electronic device integrated on a semiconductor substrate that includes: first and second transistors each comprising a gate electrode projecting from the substrate and respective source/drain regions. The process comprises: forming in cascade a first protective layer and a first conformal insulating layer of a first thickness on the whole electronic device; forming a first mask to cover the first transistor; removing the first conformal insulating layer not covered by the first mask; removing the first mask; forming a second conformal insulating layer of a second thickness on the whole device; and removing the insulating layers until the protective layer is exposed to form first spacers of a first width on the side walls of the gate electrodes of the first transistor and second spacers of a second width on the side walls of the gate electrodes of the second transistor.

REFERENCES:
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patent: 6506642 (2003-01-01), Luning et al.
patent: 6635538 (2003-10-01), Morihara et al.
patent: 6943077 (2005-09-01), Liu et al.
patent: 2004/0232511 (2004-11-01), Fujio et al.
patent: 2005/0179078 (2005-08-01), Lee
patent: 2005/0202622 (2005-09-01), Violette et al.
patent: 2005/0269640 (2005-12-01), Shimamoto et al.

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