Process for forming a high-K gate dielectric

Details Process for forming a high-K gate dielectric Process for forming a high-K gate dielectric

2000-05-17

2001-02-06

Quach, T. N. (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S585000, C438S785000, C438S786000

Reexamination Certificate

active

06184072

ABSTRACT:

FIELD OF THE INVENTION
The present invention is related to the field of electronic devices, particularly to semiconductor devices, and more particularly to the field of processing of semiconductor devices to achieve a high K gate dielectric on a silicon substrate.
RELATED ART
As semiconductor devices become smaller there is a need for higher dielectric constant (K) gate material. It is known that many metal oxides, when deposited or grown over silicon crystal substrates provide a higher dielectric constant. However a high quality silicon dioxide layer is also desirable in order to have a good interface with a silicon substrate material. One solution to this problem has been to deposit metal oxides directly onto a silicon layer. This technique may cause problems, however, because some oxidation of the silicon occurs during the process, resulting in a silicon dioxide layer between the metal oxide and the silicon. Because the metal oxide deposition is done at low temperature this is a poor quality silicon dioxide. Therefore, a second annealing step is necessary which results in a thicker silicon dioxide interface layer, also undesirable.


REFERENCES:
patent: 4495219 (1985-01-01), Kato et al.
patent: 6013553 (2000-01-01), Wallace et al.
patent: 6015739 (2000-01-01), Gardner et al.
patent: 6020024 (2000-02-01), Maiti et al.
patent: 6020243 (2000-02-01), Wallace et al.
patent: 6060755 (2000-05-01), Ma et al.
patent: 6110784 (2000-08-01), Gardner et al.

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