Process for formation of ultra-thin base oxide in high...

Details Process for formation of ultra-thin base oxide in high... Process for formation of ultra-thin base oxide in high...

2000-12-19

2002-09-10

Chaudhari, Chandra (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S287000, C438S585000, C438S591000, C438S723000, C438S976000, C438S981000

Reexamination Certificate

active

06448127

ABSTRACT:

TECHNICAL FIELD
This invention is related to an improved structure for an integrated circuit. In particular, the invention is related to a method and article of manufacture for a deep submicon complementary metal oxide semiconductor (CMOS) integrated circuit. Further, the invention involves a method for creating an ultra-thin base oxide layer for a high-k/oxide stack gate dielectric.
BACKGROUND OF THE INVENTION
A principal emphasis of current semiconductor device technology is directed to ultra-large scale integrated circuits in which CMOS structures are an important component. The needs of the microelectronics industry have forced evolution to smaller devices and thinner layers of materials for meeting performance requirements of the devices. As a consequence of these requirements, the gate oxide component is approaching dimensions which will enable direct carrier tunneling to take place, causing high leakage currents to occur in the CMOS-based devices. It is in the consensus in the industry that SiO
2
gate oxide thickness can only be reduced to about 15 Ångstroms (Å). For the next generation of devices, it is therefore expected that a gate dielectric material must have thickness smaller than 15 Å in equivalent oxide thickness (EOT).
SUMMARY OF THE INVENTION
Solutions to the problem of ultra-thin gate dielectrics are directed in this invention generally to use of a stack of high dielectric constant (k) dielectric and an oxide which will be used to replace the single layer of SiO
2
. A base oxide in a high-k/oxide stack can serve to form a buffer layer to preserve the desirable properties of an SiO
2
/Si interface and also prevent reaction between the Si and the high-k material in the stack. Consequently, an ultra-thin buffer oxide layer (about 5 Å thickness) can provide a solution to the problem of achieving an equivalent oxide thickness less than 15 Å. The instant invention includes forming an ultra-thin base oxide by a method of initially removing native oxide of SiO
2
from a Si substrate by subjecting the device to a hydrogen baking step, followed by thermal growth of a controlled thickness of oxide and then reducing the base oxide thickness to about 5 Å by a post hydrogen anneal.
These and other objects, features and advantages of the invention will be apparent from the following description of the preferred embodiments and examples, taken in conjunction with the accompanying drawings described below.


REFERENCES:
patent: 5738909 (1998-04-01), Thakur et al.
patent: 5972804 (1999-10-01), Tobin et al.
patent: 6171911 (2001-01-01), Yu
patent: 6020024 (2001-02-01), Maiti et al.

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