Process for fabricating nonvolatile semiconductor memory device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438 3, 438253, 438396, H01L 2100, H01L 218242, H01L 2120

Patent

active

058541047

ABSTRACT:
A process for fabricating a nonvolatile semiconductor memory device has one transistor and one ferroelectric capacitor electrically connected to each other by a contact plug, which comprising forming a transistor; forming an inter-layer insulating film, at least an upper surface portion thereof being a titanium oxide film; forming a capacitor lower electrode; and forming a capacitor insulating film and a capacitor upper electrode, wherein the lower electrode forming step comprises: depositing a titanium nitride film and a platinum film on the titanium oxide film; etching the platinum film with a first etching gas adapted to suppress deposition of substances including platinum; and etching the titanium nitride film with a second etching gas having a high etching selectivity to the titanium oxide film.

REFERENCES:
patent: 5046043 (1991-09-01), Miller et al.
patent: 5350705 (1994-09-01), Brassington et al.
patent: 5407855 (1995-04-01), Maniar et al.
patent: 5418388 (1995-05-01), Okudaira et al.
Onishi et al., IEDM(1994), "A Half-Micron Ferroelectric Memory Cell Technology with Stacked Capacitor Structure", pp. 843-846.

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