Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1995-10-26
2001-04-24
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S535000
Reexamination Certificate
active
06221726
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the doping of silicon, particularly to the determination of proper silicon doping utilized in integrated circuit fabrication, and more particularly to silicon device structures for obtaining real-time feedback during integrated circuit fabrication relative to the doping operation.
A significant problem in the integrated circuit manufacturing industry is that of monitoring the results of each process step. The importance of real-time process monitoring for accurate decision-making during the fabrication sequence has given rise to an entire industry devoted to providing the equipment necessary to accomplish this task. Of all of the processing steps, one of the most critical is that of doping the silicon semiconductor. Of utmost importance during the doping process is to achieve uniformity of both junction depth and impurity dose both across the silicon wafer and from wafer to wafer. To monitor the uniformity of dopants in silicon, numerous diagnostic tools have been developed. However, none of these tools gives real-time feedback concerning the electrically active impurity dose and the junction depth. The present invention addresses this problem. Using newly designed test structures and a pulsed laser annealing technique, the invention enables the measurement, in real time, of the active impurity dose and junction depth of doped junctions formed by both ion implantation and gas immersion laser doping (GILD). Data obtained from the test structures can be utilized to determine dopant yield during the doping operation.
SUMMARY OF THE INVENTION
An object of the present invention is to monitor uniformity during doping of silicon.
A further object of the present invention is to provide means for determining uniformity of both junction depth and impurity dose in a silicon wafer, and a process for fabricating and utilizing such a means.
Another object of the invention is to enable measurement, in real time, of the active impurity dose and junction depth of doped junctions.
Another object of the invention is to provide device structures for real-time process control of silicon doping, and a process for fabrication and utilization thereof.
Another object of the invention is to enable dopant monitoring in silicon by a process involving the fabrication of test structures, which involves a patterned aluminum layer, pulsed laser annealing, and electrical measuring to determine the dose and depth of the impurities incorporated during the doping step.
Another object of the invention is to produce silicon test structures for obtaining real-time feedback during integrated circuit fabrication.
Other objects and advantages of the present invention will become apparent from the following description. The present invention involves device structures for real-time process control of silicon doping by providing doping process parameters immediately after the doping process has occurred. The test structures are processed through contact formation using standard semiconductor fabrication techniques. After forming the contacts, the structures are covered with oxide and aluminum, and the aluminum is then patterned to expose the contact pads and selected regions of the silicon to be doped. Doping is then performed, such as by ion implantation, gas immersion laser doping, etc. Following doping, the entire structure is annealed with a pulsed laser, such as an excimer laser, which has no effect on the aluminum contacts because laser light is reflected thereby. Once the annealing process is complete, the structures can be probed (electrically tested), using standard techniques, to ascertain important data. Analysis of the data is then used to determine probable yield reductions due to improper execution of the doping procedure. Different structures can be used to measure uniformity, dose, and junction depth of the doped regions. These structures can be used to obtain real-time feedback during integrated circuit fabrication and to better understand and thereby enhance yield of the doping operation.
REFERENCES:
patent: 4380864 (1983-04-01), Das
patent: 4646426 (1987-03-01), Sasaki
patent: 5316969 (1994-05-01), Ishida
patent: 5474940 (1995-12-01), Tsakamoto
Carnahan L. E.
Chaudhari Chandra
The Regents of the University of Claifornia
Thompson Alan H.
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