Process for fabricating bottom electrode of capacitor

Details Process for fabricating bottom electrode of capacitor Process for fabricating bottom electrode of capacitor

1998-04-03

1999-08-03

Kunemund, Robert

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438398, 438704, 438712, 438735, 438761, 438764, 438792, H01L 218242

Patent

active

059337281

ABSTRACT:
A process for fabricating bottom electrodes for storage capacitors of memory cell units of a DRAM is disclosed. The process employs the use of a protective dielectric layer that serves as an etching shield in the process of fabrication of the capacitor electrode. The HSG-Si layer that substantially increases the surface area of the capacitor electrode can be protected from etching damage, thereby avoiding short-circuiting phenomena found in the conventional fabrication processes. Improved data retention time capability of the DRAM memory cells can thus be obtained utilizing the fabrication process of the invention.

REFERENCES:
patent: 5723373 (1998-03-01), Chang et al.
patent: 5766995 (1998-06-01), Wu
patent: 5814549 (1998-09-01), Wu
patent: 5866455 (1999-02-01), Wu

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