Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-10-31
1999-11-16
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
257371, 257296, H01L 2968
Patent
active
059857099
ABSTRACT:
A triple-well structure for semiconductor IC devices such as an SRAM IC device and a process for its fabrication, that allows for improved data storage stability as well as improved immunity capability against interference from device I/O bouncing and alpha particles. The triple-well structure includes at least one P-well in a P-type substrate, a number of N-wells, and a retrograde P-well formed within one of the N-wells. The process for fabricating the triple-well structure includes first implanting boron ions in the P-type substrate. A photomask is subsequently formed for the implantation of phosphorous ions in the region where a P-type MOS transistor is to be fabricated. A high temperature drive-in procedure is then employed to form a P-well and a number of N-wells. A selected area of one of the N-wells where an N-type MOS transistor is defined is then subjected to boron ion implantation, which is followed by an annealing procedure to form the retrograde P-well.
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Chang Chun-Yen
Chien Sun-Chieh
Hsu Chen-Chiu
Lee Chung-Yuan
Blum David S
Bowers Charles
United Microelectronics Corp.
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