Process for fabricating a solder bump for a flip chip integrated

Details Process for fabricating a solder bump for a flip chip integrated Process for fabricating a solder bump for a flip chip integrated

1996-12-23

1998-06-02

Picardat, Kevin

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438614, H01L 2144

Patent

active

057599106

ABSTRACT:
A process for fabricating a solder bump having an improved geometry includes the steps of evaporatively depositing a first metallization system to form a post having a predetermined volume onto an integrated circuit having a passivation layer defining a die pad window, wherein the length of the post is greater than the width of the post, and wherein the length of the post extends beyond the die pad window over the passivation layer, and evaporatively depositing a second metallization system onto the post to form a cap also having a volume, wherein the first metallization system forming the post and the second metallization system forming the cap, when reflowed, form a eutectic solder bump.

REFERENCES:
patent: 4950623 (1990-08-01), Dishon
patent: 5244833 (1993-09-01), Gansauge et al.
patent: 5441917 (1995-08-01), Rostoker et al.
patent: 5466635 (1995-11-01), Lynch et al.
patent: 5468655 (1995-11-01), Greer
patent: 5470787 (1995-11-01), Greer
patent: 5503286 (1996-04-01), Nye, III et al.
patent: 5586715 (1996-12-01), Schwiebert et al.

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