Process for fabricating a semiconductor device having a segmente

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438526, 438532, 438595, H01L 21266

Patent

active

056680210

ABSTRACT:
A process for fabricating an MOS device (44) having a segmented channel region (48) includes the fabrication of a compound MOS gate electrode (46). Both the segmented channel region (48) and the MOS gate electrode (46) are formed by creating an opening (18) and an insulating layer (16) overlying a first polycrystalline silicon layer (14). The lateral extent of both the MOS gate electrode (46) and a buried junction region (24) formed in the semiconductor substrate (10) are defined by first sidewall spacer (22) and a second sidewall spacer (32) formed adjacent to the first sidewall spacer (22).

REFERENCES:
patent: 4371955 (1983-02-01), Sasaki
patent: 5374574 (1994-12-01), Kwon
patent: 5484743 (1996-01-01), Ko et al.
patent: 5489543 (1996-02-01), Hong
patent: 5538913 (1996-07-01), Hong
patent: 5597752 (1997-01-01), Niwa

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