Process for fabricating a semiconductor device having...

Details Process for fabricating a semiconductor device having... Process for fabricating a semiconductor device having...

2006-07-18

2006-07-18

Lee, Hsien-Ming (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S296000, C438S424000, C438S427000

Reexamination Certificate

active

07078286

ABSTRACT:
A process for fabricating a semiconductor device having electrically isolated low voltage and high voltage substrate regions includes low voltage and high voltage trench isolation structures in which a deep portion of the high voltage isolation trench provides electrical isolation in the high voltage regions. The high voltage isolation trench structures include a shallow portion that can be simultaneously formed with the low voltage trench isolation structures. The deep portion of the high voltage isolation trench has a bottom surface and shares a continuous wall surface with the shallow portion that extends from the bottom surface to the principal surface of the substrate. A process for fabricating the device includes the formation of sidewall spacers to define a minimum isolation width between adjacent high voltage nodes.

REFERENCES:
patent: 5714412 (1998-02-01), Liang et al.
patent: 6051467 (2000-04-01), Chan et al.
patent: 6171930 (2001-01-01), Lee et al.
patent: 2002/0024111 (2002-02-01), Shin
patent: 2002/0033516 (2002-03-01), Choi et al.
U.S. Appl. No. 10/236,114, filed Sep. 6, 2002, Mehta et al.

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