Process for fabricating a CMOS structure with ESD protection

Details Process for fabricating a CMOS structure with ESD protection Process for fabricating a CMOS structure with ESD protection

1996-03-11

1997-04-15

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438233, 438230, 438586, 438705, 438934, H01L 218238

Patent

active

056209207

ABSTRACT:
A process is disclosed for fabricating a CMOS structure with ESD protection. The outside transistors are covered with a protective oxide layer which is so masked as to cover the areas of the respective source and drain regions adjoining the field-oxide regions and the gate regions. The protective oxide layer is then subjected to a heat treatment, after which a siliciding process is carried out.

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