Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Patent
1998-08-10
2000-10-24
Smith, Matthew
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
438514, 438522, 438510, H01L 21425
Patent
active
061366722
ABSTRACT:
A process for semiconductor device fabrication in which a Czochralski silicon substrate is implanted with boron is disclosed. The boron is implanted using an energy of about 500 keV to about 3 MeV and a dose of about 3.times.10.sup.13 /cm.sup.2 to about 3.times.10.sup.14 /cm.sup.2. In order to reduce the threading dislocation density in the substrate to less than about 10.sup.3 /cm.sup.2 at a depth in the substrate of at least about 0.5 .mu.m, after the implant, the substrate is annealed in a two-step process. First the substrate is annealed at a temperature in the range of about 725.degree. C. to about 775.degree. C. followed by an anneal at a temperature of at least about 900.degree. C. The duration of the first step is selected to provide a dislocation density of less than about 10.sup.3 /cm.sup.2 at the desired depth in the substrate.
REFERENCES:
patent: 4456489 (1984-06-01), Wu
patent: 4584026 (1986-04-01), Wu et al.
patent: 5399506 (1995-03-01), Tsukamoto
"Anonmalous Leakage Current Reduction by Ramping Rate Control in MEV Impantation", by Hamada, K. et al. Mat. Res. Symp. Proc., vol. 396, pp. 739-743 (1996).
"High Energy Ion Implantation for ULSI: Well Engineering and Gettering", by Tsukamoto, K. et al., Solid state Technology, pp. 49-51 (Jun. 1992).
"High-Energy Ion Implantation for ULSI", by Tsukamoto, K. et al., Nuclear Instruments and Methods in Physics-Research, B59/60, pp. 584-591 (1991).
"Formation of Extended Defects in Silicon by High Energy Implantation of B and P", by Cheng, J. Y. et al., J. Appl. Phys., 80 (4), pp. 2105-2112 (Aug. 15, 1996).
"Bipolar Transistor with a Buried Layer Formed yb High-Energy Ion Implantation for Subhalf-Micron Bipolar-Complementary Metal Oxide Semiconductor LSIs", by Kuroi, T. et al., Japan J. Appl. Phys., 33, pp. 541-545 (1994).
S. Wolf and R. N. Tauber, Silicon Processing for the VLSI Era. vol. 1, Chapter 9, Aug. 1986.
J. P. Cheng et al., Formation of extended defects in silicon by high energy implantation of B and P, Appl Phys, 80 (4), Aug. 1986.
Bourdelle Konstantin K.
Eaglesham David James
Botos Richard J.
Keshavan Belur V
Lucent Technologies - Inc.
Smith Matthew
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