Process for deuterium passivation and hot carrier immunity

Details Process for deuterium passivation and hot carrier immunity Process for deuterium passivation and hot carrier immunity

1999-08-23

2001-02-13

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S585000, C438S643000, C438S648000, C438S649000, C438S795000, C438S770000, C438S799000, C438S787000

Reexamination Certificate

active

06187665

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to semiconductor integrated circuit devices, most generally, and the processes for forming these devices. More specifically, this invention relates to the processes used to provide a dielectric film structure having trap sites passivated with deuterium and an enhanced immunity to hot carrier aging effects.
BACKGROUND OF THE INVENTION
Semiconductor integrated circuit devices include a thin dielectric film, commonly a thermally grown oxide, which functions as a gate dielectric for transistors which are formed within the semiconductor substrate and incorporated into semiconductor integrated circuit devices. The gate dielectric film is typically formed on the semiconductor substrate over a region within the substrate which will serve as a channel region of a transistor, and beneath a subsequently formed gate electrode. A thin interface region forms the boundary between the gate dielectric film and the substrate surface. The transistors function when the channel region formed in the semiconductor substrate is biased to allow a current to flow from a source region to a drain region by way of the channel region. A gate voltage applied to the gate electrode disposed atop the gate dielectric film provides the necessary bias. When the applied gate voltage exceeds the threshold voltage (V) of the transistor, current flows laterally from the source region to the drain region through the channel region, and the transistor is turned “ON”.
The quality and integrity of the gate dielectric film is critical to the functionality of the transistor devices which include a very tightly defined set of operational characteristics which, in turn, are very sensitive to the characteristics of the materials and process operations used to form the transistor devices. It is important, therefore, to maintain the operational characteristics of the gate dielectric film, and specifically, to suppress any changes associated with the fixed electrical charge of a gate dielectric film and the interface region formed between the gate dielectric film and the underlying substrate surface.
A thermally grown oxide film, commonly used as a gate dielectric material in the semiconductor processing industry, carries with it an electrical charge—called a fixed oxide charge. This fixed oxide charge influences the threshold voltage required for turning on a transistor device. If the charge associated with the gate oxide film changes in time, so, too, will the actual threshold voltage which must be applied to turn on the transistor. When the threshold voltage changes in time due to a change in the fixed oxide charge, or when the actual threshold voltage of a manufactured transistor device differs from the targeted threshold voltage due to unanticipated charge characteristics of the oxide film, device functionality is destroyed. Therefore, it is of critical importance to suppress the addition of any trapped electrical charges which alter the operational characteristics, specifically, the charge characteristics of the film.
In the semiconductor manufacturing industry, the gate dielectric film is typically an oxide film thermally grown on a silicon substrate to form a silicon dioxide (SiO
2
) film, hereinafter referred to as an “oxide” film. Defects such as impurities and dangling or broken bonds within the oxide film form trap sites, or “traps”. Traps within a gate oxide film can exist at the gate electrode/oxide interface, the bulk oxide film, or the oxide/substrate interface. Interface traps located at the oxide/substrate interface are especially prevalent. This is so, because, during the formation of the gate oxide film, a transition region forms between the crystalline silicon and the amorphous gate oxide. As a result, the transition region (the oxide/substrate interface) includes many incompletely bonded species which constitute trap sites.
These trap sites are usually uncharged, but can become charged when electrons and holes are introduced into the oxide and become trapped at the trap site. One way that traps become charged is by avalanche injection of highly energetic electrons or holes into the oxide. These highly energetic electrons or holes are commonly called “hot carriers”. Trap sites are commonly “passivated” by a passivation species which complexes with, and occupies, the trap sites and makes the sites resistant to being occupied by the hot carriers. Highly energized hot carriers, however, can displace or “knock out” the passivation species from the trap site.
Hot carriers develop and become injected into trap sites existing in oxide films as a result of at least three effects: i) subsequent processing operations such as plasma processes can produce hot carriers, ii) the oxide film is exposed to radiation environments which produce hot carriers, and iii) during device operation, the electric field created by applying voltages to the device can create hot carriers.
Several processing operations commonly used in the fabrication of semiconductor devices produce radiation environments which result in radiation damage to the oxide film as above. Among such commonly used processing operations are included: e-beam evaporation; sputtering; plasma-enhanced chemical vapor deposition (PECVD); plasma etching; ion implantation; and direct write e-beam and x-ray lithography. It can be seen that these processing operations result in the production of hot carriers which become trapped in unoccupied trap sites or which replace passivation species from occupied trap sites and which add a trapped charge to the dielectric film. The trapped charge contributes to the fixed oxide charge and changes the operating characteristics, specifically the threshold voltage (i.e. the voltage necessary to turn “on” a transistor), of a semiconductor integrated circuit device.
Additionally, hot carriers may be injected into unoccupied or passivated trap sites within the oxide or interface region after complete formation of the semiconductor device. This can occur due to the semiconductor device being operated in a radiation environment, or from highly energetic particles such as gamma-rays from space, which can enter the oxide and become trapped at the trap sites. More commonly, hot carrier injection occurs during device operation due to the electric field created as a result of voltages being applied to a device during operation. When this occurs in time and gradually degrades the device and decreases the lifetime of the device by changing the operational characteristics in time, it is known as hot carrier aging.
The conventional method for making a semiconductor device immune to hot carrier effects, is to “passivate” the trapped sites within the oxide film. Alternatively stated, the lifetime of a device (the time before hot carrier degradation destroys device performance), can be increased by minimizing and/or reducing the number of trap sites in the gate oxide by passivating them. In essence, this reduces the density of unoccupied trap sites available which injected hot carriers may occupy. The trap sites may be passivated by annealing in a passivating species such as hydrogen, at relatively high temperatures. The hydrogen diffuses into the oxide film and occupies the trap sites by complexing with the dangling bonds or impurities which form the trap site.
Occupied by a passivating species such as hydrogen, the trap sites are no longer open to trap charged hot carriers. Energized hot carriers, however, can displace or “knock out” a passivating species from a passivated, or occupied, site. The energized hot carriers are often produced during device operation as a result of the voltages applied to the device. Most commonly, during device operation, energized hot carriers travel laterally from the source or drain regions of a transistor and into the oxide/substrate interface in the channel region, thereby knocking out a passivating species from a passivated trap site. This can destroy device performance. As such, it is desirable to passivate trap sites with a passivating species which is resistant to bein

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