Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2002-02-11
2004-11-23
Meeks, Timothy (Department: 1762)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S151000, C438S197000, C438S585000, C438S787000, C438S791000, C117S088000, C427S248100, C427S255290, C427S255394
Reexamination Certificate
active
06821825
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to depositing semiconductor films, such as those containing Si, Ge and/or carbon for integrated circuit fabrication. More particularly, the invention relates to making these materials with greater thickness and compositional uniformity in chemical vapor deposition systems.
2. Description of the Related Art
As the dimensions of microelectronic devices become smaller, the importance of the physical and chemical properties of the materials used in their manufacture becomes more important. This is particularly true for those advanced materials that can be integrated into existing generations of devices using already-proven manufacturing tools. For example, it would be desirable to incorporate epitaxial Si
1−x
Ge
x
and Si
1−x−y
Ge
x
C
y
alloys into Bipolar and BiCMOS device manufacturing processes. These advanced alloy materials have utility as base layers in heterojunction bipolar transistors (HBT), resistors in BiCMOS devices and as gate electrodes in CMOS devices and various other integrated electronic devices.
Conventional processes for the deposition of single crystal, amorphous and/or polycrystalline silicon, silicon germanium (SiGe) and silicon germanium carbon (SiGeC) alloys arc typically performed using batch thermal processes (either low pressure (LP) or ultra-high vacuum (UHV) conditions) or single wafer processes. Single wafer processes are becoming increasingly significant, but a number of problems remain. For instance, within-wafer and wafer-to-wafer uniformity, deposition rates, and process repeatability remain a concern with conventional single wafer processes, particularly for in situ doped semiconductor films. As wafers continue to increase in size (currently 300 mm wafers are being integrated into fabrication processes), maintaining uniformity is becoming more challenging still.
Japanese Patent Application Disclosure Number S60-43485 discloses the use of trisilane to make amorphous thin films at 300° C., apparently for photovoltaic applications. Japanese Patent Application Disclosure Number H5-62911 discloses the use of trisilane and germane to make thin films at 500° C. or less. Japanese Patent Application Disclosure Number H3-91239, H3-185817, H13-187215 and HO2-155225 each disclose the use of disilane, some also mentioning trisilane.
The art has generally focused on the use of disilane and trisilane for producing amorphous, hydrogenated silicon at relatively low deposition temperatures. However, there remains a need for a process for depositing semiconductor materials such as doped silicon, low-H content amorphous silicon and SiGe onto surfaces, preferably at high deposition rates without sacrificing good uniformity.
SUMMARY OF THE INVENTION
The inventors have discovered better ways of making Si-containing and Ge-containing films. Methods are taught for using chemical precursors such as higher-order silanes and/or higher-order germanes in CVD processes to provide improved deposition of Si-containing films, particularly silicon, SiGe or SiGeC alloy thin films useful in the semiconductor industry. These chemical precursors have reduced thermal stability relative to silane, germane and conventional carbon-source molecules.
In accordance with one aspect of the invention, the use of particular precursors allows the deposition process to be conducted closer to, or within, a mass transport limited growth regime, relative to conventional precursors at the same temperature. Within this regime, temperature dependent non-uniformities, such as undesirable elemental concentration gradients and variable film deposition rates, and consequent thickness non-uniformities, can be avoided. Preferred chemical precursors include trisilane and trisilane in combination with digermane. Uniform deposition can be achieved at temperatures lower than those used for conventional chemical precursors, with higher film deposition rates.
In another aspect of the invention, flow rates of the preferred precursors are adjusted as a function of temperature to obtain higher deposition rates with equal or greater uniformity, as compared with deposition using conventional precursors (e.g., silane). The advantages of trisilane over silane have been found particularly applicable to the deposition of silicon-containing layers as active layers in integrated transistors.
In another aspect of this invention, methods are taught for stepwise or dynamically changing process parameters such as temperature, temperature distribution, pressure, reactant flow rate and reactant partial pressure in such a way as to reduce or eliminate such undesirable elemental concentration gradients, thickness non-uniformities and variable film deposition rates. These methods can be used in conjunction with the use of higher order silanes and/or germanes.
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Hawkins Mark
Todd Michael A.
ASM America Inc.
Knobbe Martens Olson & Bear LLP
Meeks Timothy
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