Process for co-integrating DMOS transistors with schottky diode

Details Process for co-integrating DMOS transistors with schottky diode Process for co-integrating DMOS transistors with schottky diode

1999-02-03

2000-10-17

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438268, 438138, 438237, 438571, H01L 21336

Patent

active

061331074

ABSTRACT:
A DMOS device in a complex integrated circuit having a well region defined by a buried isolation region and an overlapping deep drain region within an epitaxial layer formed over a substrate, a body region having two source regions within the well region, insulated gates over the two source regions, and a Schottky contact over a central portion of the well region and spaced from the body region. The Schottky contact defines a Schottky diode within the epitaxial layer for diverting current from the substrate in the event of a below ground effect or an oversupply effect. The invention reduces or eliminates altogether the effects of parasitic transistors in the complex integrated circuit.

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patent: 5642295 (1997-06-01), Smayling
patent: 5915179 (1999-06-01), Etou et al.

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