Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1995-11-06
1998-09-15
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711213, 711123, 711122, 395383, 395584, G06F 938
Patent
active
058095292
ABSTRACT:
A method for selectively prefetching a cache line into a primary instruction cache within a processor from main memory allows for cold cache instruction prefetching of additional cache lines when the requested cache line does not reside within either the primary or secondary cache associated with the processor and there are not unresolved branches associated with the requested instruction in the cache line.
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Palacharla, et al. in "Evaluating Stram Buffers as a Secondary Cache Replacement", IEEE 1063-6879 (1994).
Chan Eddie P.
England Anthony V. S.
International Business Machines - Corporation
Kim Hong C.
Kordzik Kelly K.
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