Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-06-12
2007-06-12
Smith, Zandra V. (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S211000, C257S315000, C257S316000
Reexamination Certificate
active
10718008
ABSTRACT:
An ONO-type inter-poly insulator is formed by depositing intrinsic silicon on an oxidation stop layer. In one embodiment, the oxidation stop layer is a nitridated top surface of a lower, and conductively-doped, polysilicon layer. In one embodiment, atomic layer deposition (ALD) is used to precisely control the thickness of the deposited, intrinsic silicon. Heat and an oxidizing atmosphere are used to convert the deposited, intrinsic silicon into thermally-grown, silicon dioxide. The oxidation stop layer impedes deeper oxidation. A silicon nitride layer and an additional silicon oxide layer are further deposited to complete the ONO structure before an upper, and conductively-doped, polysilicon layer is formed. In one embodiment, the lower and upper polysilicon layers are patterned to respectively define a floating gate (FG) and a control gate (CG) of an electrically re-programmable memory cell. In an alternative embodiment, after the middle, silicon nitride of the ONO structure is defined, another layer of intrinsic silicon is deposited, by way of for example, ALD. Heat and an oxidizing atmosphere are used to convert the second deposited, intrinsic silicon into thermally-grown, silicon dioxide. An ONO structure with two thermally-grown, and spaced apart, silicon oxide layers is thereby provided.
REFERENCES:
patent: 6346448 (2002-02-01), Kobayashi
patent: 6566205 (2003-05-01), Yu et al.
patent: 6649542 (2003-11-01), Miura et al.
patent: 6657249 (2003-12-01), Nishioka et al.
patent: 6661065 (2003-12-01), Kunikiyo
patent: 6812515 (2004-11-01), Rabkin et al.
patent: 2003/0100153 (2003-05-01), Kunori
patent: 2004/0094793 (2004-05-01), Noguchi et al.
patent: 2005/0040401 (2005-02-01), Yamazaki et al.
patent: 2005/0074982 (2005-04-01), Lee et al.
Dong Zhong
Huang Chunchieh
Jang Chuck
Gimian Gideon
ProMOS Technologies Inc.
Smith Zandra V.
Tran Thanh Y.
LandOfFree
Precision creation of inter-gates insulator does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Precision creation of inter-gates insulator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Precision creation of inter-gates insulator will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3837843