Precharge circuit for memory array

Static information storage and retrieval – Read/write circuit – Precharge

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Details

365181, 365189, 307238, G11C 1140

Patent

active

042087309

ABSTRACT:
The bit lines of a word organized memory array are precharged to a potential which is substantially equal to the flip points (i.e. the point at which the cell changes state) of the memory cells of the array prior to each read and each write operation. This ensures the non-disturbance of the unselected memory cells of the array, provides greater design freedom of the memory array components, and enables the memory array to operate faster and more reliably.

REFERENCES:
patent: 4044341 (1977-08-01), Stewart

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