Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-01-27
1999-09-14
Fourson, George
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438528, 438231, H01L 21266, H01L 21336
Patent
active
059536152
ABSTRACT:
The inventive method provides MOSFET's with deep source/drain junctions and shallow source/drain extensions. The invention provides on a semiconductor wafer a gate stack with side spacers. The side spacers are etched so that a known thickness of the side spacers is left. An ion beam is used to implant Si.sup.+ or Ge.sup.+ or Xe.sup.+ to amorphize the silicon region, creating an amorphous region with two different depths. A high dose ion beam is then used to implant a dopant. An oxide layer is then deposited as a barrier layer, and then a metal layer is deposited to improve laser energy absorption. Laser annealing is used to melt the amorphous silicon region which causes the dopant to diffuse into the amorphous silicon region creating deep source/drain junctions and shallow source/drain extensions. Conventional techniques are then used to complete the transistor, which includes silicidation of the source/drain junctions. The deep source/drain junctions allow for an easier silicidation. The shallow source/drain extensions help to prevent punch through.
REFERENCES:
patent: 4584026 (1986-04-01), Wu et al.
patent: 5266510 (1993-11-01), Lee
Advance Micro Devices
Fourson George
Garcia Joannie A
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