Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate
2000-10-24
2004-08-10
Lee, Thomas (Department: 2115)
Electrical computers and digital processing systems: support
Computer power control
Power conservation
C713S323000, C713S324000
Reexamination Certificate
active
06775784
ABSTRACT:
CLAIM OF PRIORITY
This application makes reference to, incorporates the same herein, and claims all benefits accruing under 35 U.S.C. § 119 from an application entitled POWER SUPPLY CONTROL CIRCUIT FOR COMPUTER SYSTEM HAVING A PLURALITY OF POWER MANAGEMENT STATES earlier filed in the Korean Industrial Property Office on the 25
th
day of October 1999, and there duly assigned Serial No. 99-46418.
FIELD OF THE INVENTION
The present invention relates to a power supply control circuit for a computer system and, more particularly, to a power supply control circuit for controlling power supplied to a computer system according to a plurality of power management states of the computer system.
BACKGROUND OF THE INVENTION
As the number of components increases with a variety of computer functions, a computer system tends to consume great amounts of power. To reduce power consumption, various components of a computer system can be placed into a variety of different power states with differing levels of power consumption. For example, video output from a computer system, processor operation, and hard disk drive rotation can be deactivated during periods of system inactivity.
One known advanced power management technique is the Advanced Power Management (APM), which has been implemented by basic input-output system (BIOS) instructions. The APM is described in detail in the Advanced Power Management BIOS Interface Specification, Revision 1.2, dated on February 1996. In accordance with the specification, the BIOS, through operating system transparent system management interrupts (SMIs), monitors power managed devices and notifies the operating system when it is time to put the system to sleep. The operating system, in turn, notifies its device drivers of the impending power state change so they can perform an orderly shutdown of their respective devices. Following the device driver operations, control is returned to the BIOS which then performs any hardware specific duties necessary to put the system to sleep. In waking from a sleep state, the system BIOS first receives control so that it can configure system hardware for returning the system to a working state. Only after the BIOS performs its configuration tasks is control returned to the operating system.
A more sophisticated advanced power management scheme is the Advanced Configuration and Power Interface (ACPI), which is described in the Advanced Configuration and Power Interface Specification, Revision 1.0, dated on Dec. 22, 1996. Also, examples of ACPI supporting computer systems are described in, for example, U.S. Pat. No. 5,919,264 entitled System And Method For Using Data Structures To Share A Plurality Of Power Resources Among A Plurality Of Devices, to Reneris, U.S. Pat. No. 5,919,264 being incorporated herein by reference.
Under the ACPI power management scheme, when a power management or configuration event occurs, an operating system is notified via an ‘operating system visible interrupt’ known as a ‘system control interrupt (SCI)’. Also, it is the operating system itself that directs all system and device power state transitions. The ACPI specification defines six “sleep” states S
0
through S
5
. In the S
0
state, also known as the working state G
0
, the computer system is fully on and operational, consuming maximum power. In the S
5
state, also known as the soft-off state, the computer system consumes a minimal amount of power. No code is executed in the computer system, almost all devices are inactive, and the computer system awaits a wakeup event to transition the computer system to a higher activity state. Awakening from the soft-off state typically requires a complete boot of the computer system because no system context is saved prior to entering the S
5
state. The sleep states between the S
0
state and the S
5
state each specify varying amounts of component activity and, therefore, varying amounts of power consumption. Thus, the S
1
state through the S
4
state have differing wakeup latency times depending upon which devices are inactive, how much computer system context was saved prior to entering the sleep state, and other factors.
A computer system with such an ACPI power management scheme supports the ATX specification that has been written as a specification for the personal computer (PC) industry to build products more cheaply, improve ease of use and serviceability, and to incorporate new and exciting input/output (I/O) features with ease. In accordance with the ATX specification, a power management controller of a computer system is always supplied with standby power. Particularly, the sleep S
3
state of the ACPI power management scheme is a low wake-up latency sleeping state, whereby all system context are lost except the system memory and the power management controller. Also, the context of the CPU (Central Processing Unit), cache, and other chipsets are lost in this state.
A procedure in which a computer system enters the S
3
state of the ACPI power management scheme is usually called a “suspend-to-random access memory (RAM)”, in which system context is stored in a system memory. Because general booting procedures are skipped in a resume operation when a computer system returns from the sleep S
3
state to the working S
0
state, a user can quickly utilize the computer system.
Also, a computer system supporting the ACPI power management scheme typically has a power switch, or so-called soft switch, which is used to transition a computer system to the S
3
state and the S
5
state. If the soft switch is on within a predetermined time, the system enters the S
3
state. If the soft switch is on over the predetermined time, the system state switches to the S
5
state. These soft switch functions can be set active or inactive using the complimentary metal oxide semiconductor (CMOS) setup utility of a BIOS.
However, in an ACPI power management scheme supporting a computer system, the system memory is typically supplied with standby power in both the S
3
state and the S
5
state. Although the S
5
state is substantially identical to the power-off state, a user cannot replace the system memory with a new system memory in the S
5
state because the standby power is still supplied to the system memory.
U.S. Pat. No. 4,365,290 to Nelms et al., entitled Computer System with Power Control Circuit, discloses a digital computer system including a power control circuit for selectively controlling the drain imposed upon the energy source in accordance with the data input into the system and the program executed by the processor. The power control circuit is operative in at least three modes of operation, namely off/rest, power down, and operating. In the off/rest mode, the power control circuit imposes a minimum power drain upon the depletable energy source. An operator can manipulate a switch or actuation means to apply a transition signal to the power control, whereby the computer system is transitioned from its off/rest mode to its power down mode. In the power down mode, the control circuit applies power at an intermediate level to the data input means.
U.S. Pat. No. 5,167,024 to Smith et al. entitled Power Management for a Laptop Compute with Slow and Sleep Modes, discloses a power manager within a portable laptop computer that provides power and clocking control to various units within the computer in order to conserve battery power. Transistor switches controlled by the power manager control the distribution of power and/or clock signals to the various units within the computer. The power manager includes a software routine for continually monitoring the various units and, when these units are either not needed and/or not currently in use, power and/or clock signals are removed from a given unit.
U.S. Pat. No. 5,239,652 to Seibert et al., entitled Arrangement For Reducing Computer Power Consumption by Turning Off The Microprocessor When Inactive, discloses a power consumption reduction method and apparatus for a computer. The operating system running on the CPU of the computer determines when the CPU is n
Bushnell , Esq. Robert E.
Cao Chun
Lee Thomas
Samsung Electronics Co,. Ltd.
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