Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-10-30
2009-10-13
Dickey, Thomas L (Department: 2826)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S286000
Reexamination Certificate
active
07601600
ABSTRACT:
Disclosed are a power semiconductor device and a method for manufacturing the same. The power semiconductor device has a PIP capacitor and an LDMOS transistor, the LDMOS transistor having second and third gate electrodes separate from a first gate electrode, which may be formed in the process of forming the upper electrode of the PIP capacitor, so it is possible to realize an LDMOS having a higher breakdown voltage and lower Ron and Rsp without additional processing. A drain voltage, which may be different from a voltage applied to the first gate electrode, may be applied to the third gate electrode, so it is possible to realize an LDMOS having a high breakdown voltage and low Ron and Rsp.
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patent: 5489547 (1996-02-01), Erdeljac et al.
patent: 5939753 (1999-08-01), Ma et al.
patent: 6156602 (2000-12-01), Shao et al.
patent: 6933560 (2005-08-01), Lee et al.
patent: 2007/0069308 (2007-03-01), Ko
Kim Nam Joo
Ko Choul Joo
Dickey Thomas L
Dongbu Electronics Co. Ltd.
Erdem Fazli
Fortney Andrew D.
The Law Offices of Andrew D. Fortney
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