Power semiconductor device and manufacturing method therefor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S272000, C257SE21629, C257SE21643

Reexamination Certificate

active

07846799

ABSTRACT:
A manufacturing method is provided for a power semiconductor device that enables reducing its on-state voltage and power loss. The semiconductor device includes a set of L-shaped trench gates3each formed, from the top-side surface of a p base layer2, perpendicularly with respect to a first main surface of an n−layer1, to reach into a location of the n−layer1. At the lower ends of each of the trench gates3, bottom portions3dare provided to unilaterally extend a predetermined length in one direction parallel to the first main surface of the n−layer1. In addition, the extending end of one of the bottom portions3dopposes that of the other bottom portion, on the extending side of the bottom portions3d, and the interspace between each pair of adjacent bottom portions3dis set narrower than any other interspace between the trench-gate parts that are perpendicularly formed with respect to the first main surface of the n−layer1.

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patent: WO 2005/062385 (2005-07-01), None
“Transistor Technology Special”, CQ Publishing Co., Ltd., Jan. 1, 2004, No. 85, pp. 43-48, With English Abstract.

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