Power saving sensing scheme for solid state memory

Details Power saving sensing scheme for solid state memory Power saving sensing scheme for solid state memory

2011-06-14

2011-06-14

Dinh, Son T (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S221000, C365S206000, C365S210130

Reexamination Certificate

active

07961526

ABSTRACT:
Methods and apparatus are disclosed, such as those involving a solid state memory device. One such method includes selecting a plurality of memory cells in a memory array. States of a plurality of data bits stored in the selected plurality of memory cells are determined. In determining the states of the plurality of data bits, a portion of the plurality of data bits are sensed faster than others. The plurality of data bits are sequentially provided as an output. In one embodiment, the portion of the plurality of data bits includes the first bit of the sequential output of the memory device.

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