Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Reexamination Certificate
2007-10-02
2007-10-02
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Signal level or switching threshold stabilization
C326S083000, C326S093000, C326S035000
Reexamination Certificate
active
10926597
ABSTRACT:
Virtual power-gated cells (VPC) are configured with control circuitry for buffering control signals and a power-gated block (PGB) comprising two or more NFETs for virtual ground rail nodes and PFETs for virtual positive rail nodes. Each VPC has a control voltage input, a control voltage output, a node coupled to a power supply voltage potential, and a virtual power-gated node that is coupled and decoupled from the power supply potential in response to logic states on the control input. The control signals are buffered by non-power-gated inverters before being applied to the input of a PGB. VPCs may propagate a control signal that is in phase with or inverted from a corresponding control signal at the control input. VPCs may be cascaded to create virtual power rails in chains and power grids. The control signals are latched at the cell boundaries or latched in response to a clock signal.
REFERENCES:
patent: 6140836 (2000-10-01), Fujii et al.
patent: 7164291 (2007-01-01), Mair et al.
patent: 2003/0184364 (2003-10-01), Miyagi
patent: 2004/0080340 (2004-04-01), Hidaka
Kuang Jente B.
Law Jethro C.
Ngo Hung C.
Nowka Kevin J.
International Business Machines - Corporation
Tan Vibol
Winstead PC
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