Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-07-01
2008-07-01
Nhu, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S149000, C438S197000, C257SE21010, C257SE21218, C257SE21248
Reexamination Certificate
active
11548870
ABSTRACT:
A method forms a gate conductor over a substrate, forms spacers (e.g., nitride spacers) on sides of the gate conductor, and implants an impurity into exposed regions of the substrate not protected by the gate conductor and the spacers. Then the method forms a silicide on surfaces of the exposed regions of the substrate. The method forms a conformal protective layer (e.g., an oxide or other similar material) over the silicide, the spacers, and the gate conductor. Next, the method forms a non-conformal sacrificial layer (e.g., nitride or other material that can be selectively removed with respect to the protective layer) over the protective layer. A subsequent partial etching process partially etches the sacrificial layer such that relatively thinner regions of the sacrificial layer that are over the spacers are completely removed and the relatively thicker regions of the sacrificial layer that are over the substrate are not removed. The next step in the method removes only those portions of the protective layer that cover the spacers, without removing the portions of the protective layer that cover the silicide. As the spacers are now exposed and the silicide is protected by the protective and sacrificial layers, the method can safely remove the spacers without affecting the silicide.
REFERENCES:
patent: 5084417 (1992-01-01), Joshi et al.
patent: 6096647 (2000-08-01), Yang et al.
patent: 6284669 (2001-09-01), Erdeljac et al.
patent: 6297114 (2001-10-01), Iwata et al.
patent: 6437377 (2002-08-01), Ajmera
patent: 6521540 (2003-02-01), Li
patent: 7064071 (2006-06-01), Schwan
patent: 7105429 (2006-09-01), Jawarani
patent: 2004/0079993 (2004-04-01), Ning et al.
patent: 2006/0046499 (2006-03-01), Liaw
patent: 2006/0108606 (2006-05-01), Saxler et al.
patent: 2006/0125051 (2006-06-01), Liaw
Dyer Thomas W.
Fang Sunfei
Kim Jun-Jung
Lee Yong Meng
Panda Siddhartha
Cai, Esq. Yuanmin
Chartered Semiconductor Manufacturing Ltd.
Gibb & Rahman, LLC
Infineon Technologies North America Corporation
International Business Machines - Corporation
LandOfFree
Post-silicide spacer removal does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Post-silicide spacer removal, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Post-silicide spacer removal will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3929889