Post-metal etch treatment to prevent corrosion

Metal treatment – Process of modifying or maintaining internal physical... – Processes of coating utilizing a reactive composition which...

Reexamination Certificate

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C148S280000, C427S250000, C427S333000, C427S377000, C427S379000, C438S476000, C438S477000, C134S021000

Reexamination Certificate

active

06475298

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to integrated circuit manufacture. More particularly, the present invention relates to the post-etch passivation of metalized layers within semiconductors.
BACKGROUND OF THE INVENTION
Solid state devices, including semiconductors and integrated circuit devices (ICs) are manufactured in four distinct stages. They are material preparation, crystal growth and wafer preparation, wafer fabrication, and packaging. Wafer fabrication is the series of processes used to create the semiconductor devices in and on the wafer surface. The polished starting wafers enter fabrication with blank surfaces and exit with the surface covered with hundreds of completed chips.
Wafer fabrication facilities produce billions of chips world-wide, with thousands of different functions and designs. Even with this daunting diversity of device types, the basic processes which are used to form solid state devices are no more than four: layering, patterning, doping, and heat treatment.
Each of these broad processes may be further broken down. One means of patterning one or more layers formed on of a wafer during fabrication is etching. Patterning is often commenced by laying down a mask layer. One type of mask is a photoresist. Etching can be used, in conjunction with other steps such as photoresist deposition, to form a variety of features through one or more layers in an integrated circuit or other solid state device. Some of these layers are metalized, and aluminum is one metal used to form these metalized layers.
The etching of aluminum presents problems that must be overcome in order to reliably produce commercial quantities of solid state devices which are reliable and which achieve the design objectives for the device. During aluminum etching, chlorine is incorporated into the photoresist and a relatively “chlorine-rich” material is deposited on the aluminum sidewalls; this situation is represented graphically in FIG.
1
. The specific composition, thickness, and amount of Cl incorporated in the sidewall deposition is highly dependant on factors such as the type of photoresist and the etch chemistry.
In some cases the sidewall deposition can be relatively thin, e.g. Cl
2
/BCl
3
etching with I-line resist. In other cases the sidewall deposition can be hundreds of angstroms thick, for instance Cl
2
/BCl
3
/CHF
3
etching with DUV resist. For thicker depositions, the typical corrosion passivation processes can result in a situation in which the entire thickness is not depleted of chlorine. Instead, a Cl-depleted region may be formed on an outer layer as a result of the sidewall passivation. This region may be substantially chlorine-free but a “chlorine-rich” rich region exists between the depleted surface and the aluminum line. See FIG.
2
.
In order to limit the deleterious effects of corrosion, especially ongoing corrosion, within the solid state device, one of the steps commonly taken is corrosion passivation. This is especially true of metals which tend to form substantially impermeable oxides, such as aluminum.
In general, corrosion passivation results from allowing the corrosion process to begin while breaking the cycle before a significant amount of corrosion can form. Most prior corrosion passivation procedures depend on a H
2
O-based plasma to react with residual chlorine to form HCl, which is removed from the wafer surface. The photoresist is stripped off with an O
2
-based plasma process either concurrently or in a subsequent processing step. Ideally, this sequence will remove essentially all of the residual chlorine on the wafer. However, it has been observed that such current passivation methodologies may not remove all the chlorine on the surface of a wafer. Accordingly, they may result in a low “corrosion margin”, or the window of time before formation of detectable amounts of corrosion. This is especially true for “next generation” aluminum etch processes which involve DUV photoresists and aluminum etch processes containing CHF
3
or N
2
, all of which result in relatively thick deposition on the aluminum sidewall.
In order to investigate a more effective passivation methodology, it is well to study the formation of “classic” corrosion. An overview of one corrosion mechanism of significant concern in the solid state industry, including a general mechanistic sequence follows. The exact mechanisms for the formation of classic corrosion are complicated and have not been completely elucidated, but a reasonably general mechanistic sequence, with an identification of the critical factors, is presented below.
It is known that substantially any chlorine remaining on the aluminum wafer after the passivation process will result in the formation of corrosion when the wafer is exposed to ambient humidity.
1) Transport of Water to the Wafer Surface: The first step in the formation of corrosion occurs when water from the ambient environment diffuses to the surface of the wafer. The flux of water to the wafer, and the resulting equilibrium surface H
2
O concentration, will be controlled by the absolute concentration of water in the vapor: i.e., the higher the ambient water concentration, the greater the surface concentration of water.
2) H
2
O Diffusion. Before corrosion can form, the water on the surface of the wafer must diffuse to the Cl-rich region. The rate of water diffusion will be effected by temperature. The higher the temperature, the faster the diffusion. The amount of water diffusing into the sidewall will be controlled by the equilibrium concentration of water on the wafer surface. The higher the surface concentration, the larger the H
2
O flux to the corrosion site.
3) The Corrosion Cycle Begins. Water reacts with the residual Cl to form HCl, which further reacts to form corrosion. A typical reaction scheme is presented in Equations1-3:
AlCL
3
+3 H
2
O→Al(OH)
3
+3HCl  (I)
Al(OH)
3
+3HCl+3H
2
O→AlCl
3
·6H
2
O  (II)
2AlCl
3
·6H
2
O→Al
2
O
3
+9H
2
O+6HCl  (III)
The rate at which HCl is formed will depend on the concentration of residual chlorine and the amount of water that has diffused through the film. Note that water plays a key role because it acts as a catalyst for the overall corrosion reaction. The rate of each reaction is strongly dependant on the temperature the higher temperature, the faster the reaction. Moreover, while a typical reaction scheme is shown here, other reaction sequences that form corrosion may also be present. The invention taught hereinafter is not necessarily dependent on any one of these reaction sequences.
4) The Corrosion Cycle Accelerates. HCl reacts with pure aluminum to form AL
x
Cl
y
, which subsequently reacts with H
2
O to form corrosion and more HCl, see Equation IV below.
3HCl+3H
2
O+Al→AlCl
3
+3H
2
O→Al(OH)
3
+3HCl  (IV)
This cycle continues until the corrosion site breaks through the sidewall passivation and continues to grow on the outside of the aluminum line, as shown at FIG.
3
. As the local concentration of water and HCl increases, the amount and rate of corrosion formation also increases. The corrosion cycle will continue for as long as there are present H
2
O, Cl, and Al, which form the reactants. See FIG.
4
.
The typical passivation procedure occurs at conditions that serve to impede the diffusion of water and hence reduce the effectiveness of the passivation process. Specifically, these inefficiencies are as follows:
1) The entire passivation sequence is carried out at low pressure. The typical pressure range s 2-4 Torr. At these low pressures the concentration of water in the chamber is relatively low, which reduces the amount of water transported to the wafer surface, and ultimately lowers the flux of water to the Cl-rich region. This has the effect of slowing the passivation process.
2) The entire passivation sequence is carried out at high wafer temperatures. The wafer temperature range for the typical passivation methodology is 220-275° C. These high temperatures have the

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