Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-12-26
2010-06-08
Booth, Richard A. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S585000, C438S754000, C438S906000
Reexamination Certificate
active
07732284
ABSTRACT:
A method for fabricating a CMOS integrated circuit (IC) includes the step of providing a substrate having a semiconductor surface. A gate stack including a metal gate electrode on a metal including high-k dielectric layer is formed on the semiconductor surface. Dry etching is used to pattern the gate stack to define a patterned gate electrode stack having exposed sidewalls of the metal gate electrode. The dry etching forms post etch residuals some of which are deposited on the substrate. The substrate including the patterned gate electrode stack is exposed to a solution cleaning sequence including a first clean step including a first acid and a fluoride for removing at least a portion of the post etch residuals, wherein the first clean step has a high selectivity to avoid etching the exposed sidewalls of the metal gate electrode. A second clean after the first clean consists essentially of a fluoride which removes residual high-k material on the semiconductor surface.
REFERENCES:
patent: 6727187 (2004-04-01), Takeshima et al.
patent: 7186657 (2007-03-01), Hwang et al.
patent: 7192878 (2007-03-01), Weng et al.
patent: 2005/0176604 (2005-08-01), Lee et al.
Choi Jinhan
Kirkpatrick Brian K.
Riley Deborah J.
Booth Richard A.
Brady III Wade J.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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