Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-02-06
2008-10-07
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S624000, C438S622000, C438S638000, C438S673000, C257S774000, C257S751000, C257SE21584, C257SE21585
Reexamination Certificate
active
07432192
ABSTRACT:
A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2current density and second deposition step at a 60 mA/cm2current density is used to deposit a second copper layer that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.
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Cheng Hsi-Kuei
Cheng Ming-Yuan
Chuang Ray
Feng Hsien-Ping
Lee Chih-Tsung
Duane Morris LLP
Le Dung A.
Taiwan Semiconductor Manufacturing Company
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