Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-08-10
2010-06-22
Estrada, Michelle (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S091000, C438S328000, C438S380000, C438S979000, C438S983000, C257SE29327, C257SE21053, C257SE21352
Reexamination Certificate
active
07741172
ABSTRACT:
A positive-intrinsic-negative (PIN)
egative-intrinsic-positive (NIP) diode includes a semiconductor substrate having first and second main surfaces opposite to each other. The semiconductor substrate is of a first conductivity. The PIN/NIP diode includes at least one trench formed in the first main surface which defines at least one mesa. The trench extends to a first depth position in the semiconductor substrate. The PIN/NIP diode includes a first anode/cathode layer proximate the first main surface and the sidewalls and the bottom of the trench. The first anode/cathode layer is of a second conductivity opposite to the first conductivity. The PIN/NIP diode includes a second anode/cathode layer proximate the second main surface, a first passivation material lining the trench and a second passivation material lining the mesa. The second anode/cathode layer is the first conductivity.
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Brogan Conor
Griffin Hugh J.
MacNamara Cormac
Wilson Robin
Estrada Michelle
Icemos Technology Ltd.
Panitch Schwarze Belisario & Nadel LLP
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