Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2001-07-17
2004-03-02
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S695000, C438S710000, C438S700000, C438S734000
Reexamination Certificate
active
06699792
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to technology for forming small geometry spacers in semiconductor devices, and more particularly, to use of polymer spacers in such technology.
2. Discussion of the Related Art
As semiconductor device dimensions continue to decrease, problems arise in, for example, the formation of small geometry spaces, as illustrated with reference to
FIGS. 1-9
. As shown in
FIG. 1
, a layer of photoresist
20
is patterned to form photoresist bodies
22
,
24
on a substrate
26
of, for example, silicon nitride, silicon dioxide, metal, polysilicon or the like, formed on a base layer
28
, which substrate
26
is to have a space or opening formed therein. Current photoresist patterning technology limits the distance A between adjacent sidewalls
30
,
32
of the photoresist bodies
22
,
24
to a certain minimum (FIG.
1
). When an anisotropic etch step is undertaken, using the photoresist bodies
22
,
24
as a mask, the dimension A of the space
34
formed in the substrate
26
by such etching step is determined by the distance A between the sidewalls
30
,
32
of the photoresist bodies
22
,
24
, limited, as pointed out about, by current photoresist patterning technology. Thus, the dimension A of the space
34
formed in the substrate
26
(
FIG. 2
) may well be greater than desired.
An attempt to overcome this problem is illustrated in
FIGS. 3-6
. As shown in
FIG. 3
, a substrate
40
in which a space or opening is to be formed is provided on a base layer
42
. The substrate
40
has provided thereon an oxide layer
44
, which in turn has a layer of photoresist
46
, patterned into photoresist bodies
48
,
50
thereon. An anisotropic etch step of the oxide layer
44
is undertaken, using the photoresist bodies
48
,
50
as a mask (FIG.
4
), to form oxide layer bodies
52
,
54
, typically of high aspect ratio. After removal of the photoresist
48
,
50
, an oxide layer
56
is provided over the resulting structure by chemical vapor deposition (FIG.
5
), and an etching step is undertaken to form spacers
58
,
60
,
62
,
64
on the respective sidewalls
66
,
68
,
70
,
72
of the oxide bodies
52
,
54
(FIG.
6
). However, a number of problems exist in this process.
Initially, because of the high aspect ratio of the oxide bodies
52
,
54
, deposition of a properly conformal layer over the structure is problematical. Furthermore, typically, the portions
56
A of the oxide layer
56
overlying the substrate
40
and the tops
57
,
59
of the oxide bodies
52
,
54
are substantially thicker than those portions
56
B along the sidewalls
66
,
68
,
70
,
72
of the oxide bodies
52
,
54
. When an anisotropic etch is undertaken to form spacers
58
,
60
,
62
,
64
on the respective sidewalls
66
,
68
,
70
,
72
of the oxide bodies
52
,
54
(FIG.
6
), the etching process must be continued for long enough to remove the entire thickness of the portions
56
A from over the tops
57
,
59
of the oxide bodies
52
,
54
and from over the substrate
40
. Even though an anisotropic etch is undertaken, a substantial amount of the oxide portions
56
B on the sidewalls
66
,
68
,
70
,
72
of the oxide bodies
52
,
54
is also etched away, reducing the advantage which might have been obtained if the spacers
58
,
60
,
62
,
64
were of full width.
A further problem is that upon an oxide layer
56
being provided on a low k body (oxide bodies
52
,
54
), the dielectric coefficient will drop. Additionally, there may exist interface problems between the spacers
58
,
60
,
62
,
64
and oxide bodies
52
,
54
.
It will also be noted that a relatively large number of steps are required in practicing the above-described process.
FIGS. 7-9
illustrate an attempt to overcome the above described problems.
Again, a layer of photoresist
80
is patterned on a substrate
82
of, for example, silicon nitride, silicon dioxide, metal, polysilicon or the like (FIG.
7
), to form photoresist bodies
84
,
86
. The substrate
82
is formed on a base layer
88
, and the substrate
82
is again to have a space or opening formed therein. Prior to an etching step of the substrate
82
, however, an oxide layer
90
is deposited on the structure by chemical vapor deposition (FIG.
8
), with the idea that such oxide layer
90
will be anisotropically etched to form spacers
92
,
94
,
96
,
98
on respective sidewalls
100
,
102
,
104
,
106
of the photoresist bodies
84
,
86
, which would in turn determine a dimension B between the adjacent spacers
94
,
96
which is smaller (
FIG. 9
) than the dimension A between the adjacent sidewalls
30
,
32
of the photoresist bodies
22
,
24
as shown above in FIG.
1
. However, it has been found that because of the high temperature involved in the deposition of the oxide layer
90
on the structure of
FIG. 3
, i.e., 200-400° C. or more, the photoresist bodies
84
,
86
will flow or otherwise be damaged, causing the entire process to fail, and also causing contamination of the oxide deposition chamber. Additionally, even if these problems could be overcome, it is problematical to simultaneously remove photoresist and oxide
92
,
94
,
96
,
98
later in the process without damaging the underlying layer.
Therefore, what is needed is a process for overcoming the above problems in formation of small geometry spaces in semiconductor devices.
SUMMARY OF THE INVENTION
The present invention is a method of forming an opening in a substrate. Initially, a layer of photoresist is provided on the substrate, and the photoresist is patterned to provide at least first and second photoresist bodies having respective adjacent first and second sidewalls. A polymer layer is provided over the resulting structure in a low-temperature conformal CVD deposition process. The polymer layer is etched to form first and second spacers on the respective adjacent first and second sidewalls of the first and second photoresist bodies. The substrate is then etched using the first and second spacers as a mask.
The present apparatus includes a substrate, first and second photoresist bodies on the substrate and having respective first and second adjacent sidewalls, and first and second spacers comprising polymer material on the first and second respective adjacent sidewalls of the first and second photoresist bodies.
REFERENCES:
patent: 4330384 (1982-05-01), Okudaira et al.
patent: 4333793 (1982-06-01), Lifshitz et al.
patent: 4529860 (1985-07-01), Robb
patent: 4636281 (1987-01-01), Buiguez et al.
patent: 4707218 (1987-11-01), Giammarco et al.
patent: 4838991 (1989-06-01), Cote et al.
patent: 5017403 (1991-05-01), Pang et al.
patent: 5116460 (1992-05-01), Bukhman
patent: 5294296 (1994-03-01), Yoon et al.
patent: 5459099 (1995-10-01), Hsu
patent: 5750441 (1998-05-01), Figura et al.
patent: 5882535 (1999-03-01), Stocks et al.
patent: 5932491 (1999-08-01), Wald et al.
patent: 6140171 (2000-10-01), Allen et al.
patent: 6168726 (2001-01-01), Li et al.
patent: 6207583 (2001-03-01), Dunne et al.
patent: 6294314 (2001-09-01), Liao
patent: 6326302 (2001-12-01), Joubert et al.
patent: 6331380 (2001-12-01), Ye et al.
patent: 6350675 (2002-02-01), Chooi et al.
patent: 6358838 (2002-03-01), Furusawa et al.
patent: 6388226 (2002-05-01), Smith et al.
patent: 6426300 (2002-07-01), Park et al.
patent: 2002/0052125 (2002-05-01), Shaffer et al.
patent: 2002/0155639 (2002-10-01), Ohtake et al.
Fundamentals of Semiconductor Processing Technologies, El-Karch, Bajin, 1995 pp. 319-324.*
Thompson et. al. , “Etch Process Development for FLARE™0 for Dual Damascene Architecture using N2/O2 plasma” IITC, 1999, pp. 59-61.*
Kinetics of reactive ion etching of polymers in an oxygen plasma: the importance of direct reactive ion etching. Materials Research Society Symposium Proceedings (1994), 334(Gas-Phase and Surface Chemistry in Electronic Materials Processing), 433-8.
Okada Lynne
Wang Fei
You Lu
Advanced Micro Devices , Inc.
Lebentritt Michael S.
Luhrs Michael K.
LandOfFree
Polymer spacers for creating small geometry space and method... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Polymer spacers for creating small geometry space and method..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Polymer spacers for creating small geometry space and method... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3254830