Polycide gate structure with intermediate barrier

Details Polycide gate structure with intermediate barrier Polycide gate structure with intermediate barrier

1997-11-24

2000-11-14

Picard, Leo P.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257413, 257751, 257764, 438585, 438592, H01L 21283, H01L 21265

Patent

active

06147388&

ABSTRACT:
A CMOS gate structure comprises a multilayered polysilicon structure and a deposited silicide layer, with a nitridized silicide barrier layer formed therebetween. The multilayered polysilicon will exhibit a relatively large grain size and uniform structure. The deposited silicide layer is annealed to mimic the polysilicon grain size and structure. The combination of the tailored grain structure with the intermediate barrier layer results in a gate structure that is essentially impervious to subsequent dopant diffusions.

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