Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-12-18
2000-05-16
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438304, 438596, H01L 218247
Patent
active
060636688
ABSTRACT:
A layer of polysilicon is deposited over an oxide layer on top of a silicon substrate, with core field oxide and active regions, and patterned. An oxide mask is then added. Next, the oxide mask and the layer of polysilicon are removed from above the core field oxide regions. Next, a second layer of polysilicon is deposited and etched to form polysilicon spacers. Later, an ONO dielectric, a third polysilicon layer, a tungsten silicide layer, and SiON layers are successively formed and patterned. The polysilicon spacers effectively seal any recesses that may occur in the edges of the first polysilicon layer to prevent harboring of subsequently added polysilicon material. Accordingly, NAND-type flash memory core cells cannot be electrically shorted by polysilicon material, so called "polystringers", present in such recesses.
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Chang Kent Kuohua
He Yue-song
Wang John Jianshi
Advanced Micro Devices , Inc.
Chaudhari Chandra
Kwok Edward C.
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