Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1998-09-24
2001-07-10
Lefkowitz, Sumati (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S120000, C710S106000
Reexamination Certificate
active
06260092
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to computer data links and, more specifically, to Fibre Channel and PCI bus based system interconnects.
BACKGROUND OF THE INVENTION
In computer systems, parallel buses such as the PCI (Personal Computer Interconnect) bus have been used to achieve high bandwidth connectivity between peripheral devices and processors and between multiple processors. In high speed data communications, serial interconnection schemes such as the Fibre Channel have been developed to produce high bandwidth within a single serial connection. These serial interconnection schemes have been used in computer systems, but have carried a cost of a unique interface requirement and a protocol that is incompatible with other peripheral devices. In addition, when they are tightly integrated into a computer system, the system controller circuits must be modified to use this connection, requiring custom components to be developed which raise the overall cost and complexity of the computer system.
The Fibre Channel has an overhead connected with link protocol and link recovery that is prohibitive when bandwidths are required which push the limit of the channel. The initialization times for a device can be on the order of milliseconds. This is a delay which is unnecessary when operating within a system where all devices are known or device information does not have to be polled every time a link failure occurs.
Within the realm of the parallel bus computer, interconnection is also a problem. Parallel bus interconnects require a high trace density on a circuit board, usually requiring a multitude of circuit board layers for both trace implementation and EMI (electromagnetic interference) and RFI (radio frequency interference) shielding. Serially connected buses reduce this requirement substantially but have produced an added cost of incompatibility with parallel connected components and have lower bandwidth than parallel connected buses.
Therefore a need existed to provide devices and methods for reducing interconnect signal line count by using a serially connected bus and to improve the operation of the existing serial buses such as the Fibre Channel so that the bandwidth can be improved to make this serial connection function as a practical alternative to existing parallel buses. A need also existed to provide connectivity to present buses such as the PCI bus, to maintain compatibility with present controllers and peripherals.
SUMMARY OF THE INVENTION
In accordance with one embodiment of the present invention, the present invention provides a distributed system that connects parallel peripheral buses using one or more serial connections.
The present invention further provides a method for increasing the efficiency of the Fibre Channel interface to allow higher throughput to make it useful for a serially connected bus.
Another aspect of the present invention provides a distributed system not only to connect peripheral buses to a host bus, but allow for interconnection to circuits which emulate a bus so that full implementation of the peripheral bus is not required for a particular host or slave.
In accordance with a more specific example embodiment of the present invention, a point to point or ring connectable bus bridge is implemented. The bus bridge is connected to a peripheral bus such as the PCI (Personal Computer Interconnect) bus and to a serial interface connection. A ring topology is formed so that each bus bridge in a system receives an input bus representation from the prior bus bridge in the system and drives the bus according to that representation. It also produces an output bus representation which represents the input representation received modified by the activity that was generated on the bus connected to that particular bus bridge.
A ring of this sort can also be driven by a non-bus bridge participant. A bus data generator and receiver can emulate the performance of all or part of the bus to simplify the connection to peripherals or hosts which do not require the full bus implementation to implement their resources in hardware.
The serial interface hardware used in this embodiment of the present invention is an industry standard interface known to those familiar with the art as the Fibre Channel. The Fibre Channel lacks sufficient throughput, at present, to practice the present invention as preferred. The state machine which drives the Fibre Channel physical layer is distinct from that of the standard Fibre Channel state machine and incompatible with devices which operate according to the Fibre Channel specification. This achieves the throughput to bridge buses operating at present bus speeds. Thus, this example embodiment uses the physical layer of the Fibre Channel but comprises a new protocol which improves the performance of the Fibre Channel physical layer in order to practice the present invention.
The foregoing and other objects, features, and advantages of the invention will be apparent from the following, more particular, description of the following embodiment examples of the invention, as illustrated in the accompanying drawings.
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Logsdon Brian Dale
Spaniol David
Story Franklyn Hayward
Lefkowitz Sumati
Philips Semiconductors Inc.
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