Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With large area flexible electrodes in press contact with...
Reexamination Certificate
1999-04-08
2001-11-20
Clark, Jhihan B (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With large area flexible electrodes in press contact with...
C257S181000, C257S772000, C257S780000, C257S773000, C257S774000
Reexamination Certificate
active
06320254
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a plug structure disposed on a base substrate, and more particularly to a plug structure adapted for a packageless bonding pad structure.
2. Description of the Related Art
After years of development, semiconductor devices are now used almost everywhere. However, integrated circuit (IC) chips fabricated in a semiconductor manufacturing plant are practically useless unless they are properly packaged. The IC chip must first be mounted on a suitable carrier, and then the carrier itself must be enclosed by a protective casing before the IC chip can be inserted inside electrical equipment. In general, the packaging process can be roughly divided into three stages:
1. A proper carrier must be selected for holding the silicon chip. Different types of carriers are available including lead frame, film carrier and printed circuit board (PCB). Normally, the use of a film carrier requires tape auotmatic bonding (TAB).
2. The silicon chip must be electrically connected to the carrier. At present, the techniques for connecting silicon chip and the carrier include wire bonding, tape automatic bonding and flip chip or controlled collapse chip connection.
3. The silicon chip and the carrier including their junciton areas must be enclosed by epoxy resin, ceramics or other packaging material, thereby forming a rigid body for protecting the IC chip and its connecting elements.
However, before the contact points on an IC chip can be used to couple electrically with the carrier, a special structure for electrical connection such as a bonding pad or a bump must first be created at those contact points. Moreover, the establishment of a proper electrical connection between the bonding pads or bumps on the silicon chip with the carrier must be carried out in special processing stations.
FIG. 1
is a schematic cross-sectional side view showing a conventional wire connection between a bonding pad on a silicon chip and a lead frame pin using wire-bonding techniques. First, a metallic bonding pad
12
is formed on a silicon chip
10
. Thereafter, the silicon chip and its surrounding lead frame are placed inside a specified wire-bonding machine. Next, the wire-bonding machine binds one end of a short piece of conductive wire
14
to the bonding pad
12
, and then binds the other end of the wire
14
to the lead frame pin
16
. In general, the conductive wires
14
can be gold, aluminum or copper wires.
FIG. 2
is a schematic cross-sectional side view showing conventional electrical connection between a bonding pad on a silicon chip and tape carrier using tape automatic bonding techniques. The method includes forming a bump
20
either on top of a bonding pad
12
or on the inner lead
18
of a film carrier. Next, an inner lead bonding (ILB) operation is carried out to join the bonding pad
12
and a portion of the inner lead
18
together. Thereafter, an outer lead bonding (OLB) operation is carried out to join the outer lead with the electrode on a substrate plate using soldering, anisotropic conductive film (ACF) or photoharden insulation resin.
FIG. 3
is a schematic cross-sectional side view showing conventional electrical connection between a bonding pad on a silicon chip and a package medium using flip-chip techniques. Similarly, the flip-chip method involves the formation of a bump
22
on a bonding pad
12
. A special machine must be used for aligning the bump
22
with the electrode
26
on a base substrate
24
and exerting a proper amount of pressure on the silicon chip. Finally, heating and underfilling operations have to be carried out by the machine.
However, in all three illustrations above, special processing operations using special processing stations have to be carried out just to link up the bonding pads. Hence, additional processing time and production cost is incurred.
SUMMARY OF THE INVENTION
Therefore, the invention is directed towards to provision of a plug structure capable of directly coupling to packageless bonding pad without having to go through a third conductive medium. The plug structure includes several plugs on a base substrate. Solder is disposed on the plug surface in which the plug can be a cylinder or mushroom-like shape and the solder can be a film or ball.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
REFERENCES:
patent: 5457879 (1995-10-01), Gurtler et al.
patent: 5889326 (1999-03-01), Tanaka
patent: 6028357 (2000-02-01), Moriyama
patent: 6031293 (2000-02-01), Hsuan et al.
patent: 6087597 (2000-07-01), Shimada et al.
patent: 6-15155 (1994-05-01), None
Chuang Andy
Liou Fu-Tai
Clark Jhihan B
United Microelectronics Corp.
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